October 27, 2026 â EBest Circuit participated in the Guangdong regional round of the 10th QUICK Cup National Electronics Manufacturing Industry Soldering Skills Competition. The event brought together skilled technicians from across the electronics manufacturing industry to demonstrate their soldering expertise, exchange practical experience, and improve their technical abilities.
Key Takeaways
Our team participated in the Guangdong regional round of the 10th QUICK Cup soldering skills competition.
The event tested practical soldering precision, temperature control and joint formation.
We support PCB fabrication, component sourcing, assembly and project-specific inspection and testing.
Our Team at the QUICK Cup Soldering Competition
During the competition, our employees demonstrated their hands-on soldering skills through tasks requiring precision, steady control, and attention to detail.
From soldering temperature control to solder joint formation, every step required practical experience and careful execution. Our team members approached the challenges with focus and professionalism, reflecting the workmanship they apply in daily PCB assembly production.
The competition also offered a valuable opportunity to learn from industry peers, explore different soldering techniques, and further develop practical manufacturing skills.
Our PCB Manufacturing and Assembly Capabilities
At EBest Circuit, we believe advanced equipment and skilled technicians work together to achieve consistent manufacturing quality. That is why we encourage employee training, technical exchanges, and participation in professional skills competitions.
With 20 years of experience in electronics manufacturing, EBest Circuit provides comprehensive PCB fabrication and PCBA assembly services, including:
PCB Manufacturing: FR4, HDI, flexible PCB, rigid-flex PCB, metal core PCB, and ceramic PCB.
SMT Assembly: Four SMT production lines supporting fine-pitch components, BGA, and complex PCB assemblies.
Our quality management systems include ISO 9001, ISO 13485, IATF 16949, and AS9100D, supporting manufacturing requirements across medical electronics, automotive, industrial control, and other demanding applications.
How We Improve Skills and Manufacturing Quality?
Participating in the QUICK Cup reflects EBest Circuit’s commitment to employee development and continuous manufacturing improvement. By combining practical experience, professional training, and advanced production capabilities, we continue to strengthen our team’s technical expertise.
Behind every reliable PCB assembly is a team that cares about every detail.
Whether you need PCB prototypes, low-volume PCBA, or volume production, EBest Circuit is ready to support your project with engineering assistance, manufacturing, and quality control.
For PCB and PCBA quotations, feel free to contact us at sales@bestpcbs.com.
PCB to PCB soldering joins compatible conductive features on two circuit boards into a permanent electrical connection. A castellated module can sit directly on matching carrier-board pads, while soldered pins can connect boards at a defined spacing. Reliability starts with the joint geometry, access for heating and inspection, and a mechanical support arrangement that does not ask small solder joints to carry the entire assembly.
Can You Solder One PCB Directly to Another?
Yes, when both boards have solderable features intended to meet. Plated half-holes around a module edge are a common example: each half-hole aligns with a carrier land, and solder connects the exposed plating to that land. Two arbitrary board edges covered in solder mask will not form the same connection.
Decide whether the connection needs to be permanent before choosing the layout. A soldered module can reduce connector height and part count, but replacing it requires controlled rework. A separable board-to-board connector is generally more practical where routine servicing or repeated removal is part of the product requirement. Direct soldering also leaves less freedom to accommodate footprint errors after fabrication.
Which Connections Are Suitable for PCB to PCB Soldering?
The relevant types of PCB soldering depend on how the two boards meet. Start with board orientation, service access and mechanical loads, then select the joining process. A continuous solder bead along unrelated board edges is not a substitute for a designed interconnect.
Connection
Suitable arrangement
What the design must provide
Castellated module
Small module mounted flat on a carrier
Matched lands, controlled placement, solder access and required underside clearances
Soldered pins or headers
Boards separated vertically or joined at an angle
Compatible holes and pins, spacing control, access to each soldered end and support
Designed edge or tab joint
Fixed board geometry with exposed joining lands
Defined copper geometry, a locating fixture and a validated load path
Flex termination soldered to a rigid board
Low-profile flexible interconnect
Purpose-designed exposed fingers, alignment support and strain relief outside the joint
When soldering header pins to PCB holes on both boards, hold the boards at the specified spacing while the joints solidify. Confirm access to both ends before choosing this construction. Short wire links are another option when the board positions cannot be matched directly. They require strain relief and routing space, and they are not equivalent to a compact surface-mounted module. For high-speed signals or substantial current, evaluate the complete connection path rather than assuming that fewer parts automatically means better performance.
How Do Castellated Holes Connect a Module to a Carrier Board?
Castellated holes are plated holes intersected by the finished PCB edge. Their exposed, curved copper walls provide solderable surfaces beside the module. The carrier’s land extends into the matching connection region so solder can wet both surfaces. The visible outside fillet provides useful inspection access, although it cannot reveal every hidden interface beneath the module.
Half-hole plating quality, edge definition and land registration matter before assembly starts. A damaged or poorly plated edge cannot be corrected simply by adding more solder. For a new module design, specify the finished outline and half-hole requirements together with the carrier footprint; do not derive production dimensions from a photograph.
On FR4 PCBs, board thickness, copper distribution and surface finish also affect how the joint heats and wets. The module manufacturer’s recommended land pattern remains the starting point when using an existing module.
How Should the Two PCB Footprints Be Matched?
Compare both coordinate systems, not just the nominal pitch. Check pin 1, rotation, row spacing, board outline tolerance, pad dimensions and any module features extending underneath. A footprint that appears correct from above can still put copper beneath an antenna keepout or interfere with a bottom-side component.
Use the current module drawing and its specified carrier land pattern.
Check solder-mask openings and whether the module sits flat without unintended contact.
Allow tool and inspection access around the perimeter.
Review routing, copper balance and large ground connections that change local heat demand.
Keep antenna, exposed-contact and mechanical keepouts consistent across both drawings.
Provide fiducials or other suitable placement references for the assembly process.
Do a dry fit before soldering prototypes. If one end aligns but the other does not, stop and investigate dimensions or orientation. Pulling a board into place with solder can leave misregistration or residual stress that becomes visible only after cooling.
How Do You Hand-Solder Two PCBs Together?
Hand soldering is useful for accessible castellated joints and prototypes. The essential PCB soldering techniques are controlled alignment, heating both mating surfaces and limiting solder volume. Use a stable holder, magnification, appropriate fume extraction and an ESD-controlled setup for sensitive assemblies. Disconnect all power and batteries.
Inspect the lands and half-holes for damage or contamination. Use a cleaning method compatible with the board and components.
Place the module in its intended orientation and apply compatible flux where needed.
Tack one accessible corner with a small amount of solder, then verify the entire footprint before fixing the opposite side.
Place the PCB soldering iron tip so it transfers heat to both the carrier land and the module’s plated edge.
Feed a controlled amount of solder to the heated joint. Withdraw the solder wire, then the tip, and let the joint solidify without movement.
Complete the remaining connections, checking alignment and bridges as work progresses.
Clean residues only as required by the flux chemistry and product process, then inspect and test.
Choose solder wire for PCB soldering with an alloy, flux core and diameter appropriate to the joint. A large wire can make small deposits difficult to control. Do not use plumbing flux on electronic assemblies. If the tip cannot reach both surfaces, redesign the access or use a suitable assembly process instead of heating nearby components for an extended time.
A PCB soldering kit marketed for soldering circuit boards for beginners may supply an iron and wire without suitable magnification, holding support or a correctly sized tip. Check those requirements separately, and practice the same joint geometry on scrap or training boards before handling a valuable module.
When Should You Use Reflow Soldering for PCB Modules?
Reflow is appropriate when the module is qualified for that process and the carrier layout supports repeatable paste printing and placement. It can join many connections in one controlled cycle, including connections that are impractical to hand-solder. The module and every already-installed component must tolerate the planned thermal exposure.
Specify paste deposit requirements through the SMT stencil design rather than treating the stencil as a copy of the copper artwork. Aperture geometry and stencil thickness influence deposited volume, bridging and module seating. Inspect the print and placement before reflow; an oven cannot correct a misaligned footprint.
A PCB soldering machine setpoint alone does not establish a valid profile. Measure the loaded assembly and examine both the thermally heavy joints and heat-sensitive locations. Count earlier reflow operations on the module, not only the carrier’s latest pass. Follow the actual module’s limits for reflow exposure, moisture handling and orientation.
What Temperature Should You Use for PCB to PCB Soldering?
There is no single temperature that applies to every two-board assembly. For hand soldering, the iron setpoint is a tool setting; the joint temperature depends on tip contact, tip size, thermal recovery, copper area and heating time. A very fine tip may transfer heat poorly to a large ground connection even when its setpoint is high.
For reflow, use the solder paste’s recommended process window within the limits of the module, laminate and other components. Peak temperature, time above the alloy’s liquidus, ramp and cooling conditions all matter. Do not transfer a temperature from a different alloy or module into a production instruction without qualification.
When a joint heats slowly, first check contact area, tip condition, flux activity and the thermal load. Raising temperature repeatedly can damage pads or components without fixing the root cause. Where preheating is appropriate, control it as part of the complete process and verify the actual assembly temperature.
Can You Solder Flex PCB to Rigid PCB?
Soldering flex PCB to rigid PCB is possible when the flex has exposed termination features designed for the connection. The flexible dielectric itself is not solderable. Finger pitch, coverlay opening, surface finish and support near the termination must suit the selected hand, reflow or specialized joining process.
Keep the intended bend away from the soldered transition. Solder wicking into a flexible conductor can create a locally stiff region, concentrating strain at its end. A fixture or stiffened termination can maintain alignment during joining, while the product’s strain relief controls movement afterward. Do not repeatedly flex a finished joint to demonstrate that the cable is flexible.
A purpose-designed rigid-flex board can remove a separate soldered interface, but it changes the board construction and cost. A connector may be preferable when the flex must be replaced. Choose among these options before committing to a footprint, not after assembly problems appear.
How Can You Prevent Solder Bridges and Poor Wetting?
Inspect the geometry and process together. Excess solder, shifted placement, unsuitable paste deposits and closely spaced lands can create bridges. Oxidized or contaminated surfaces, exhausted flux and inadequate heat transfer can prevent wetting. Adding flux is not a reliable repair for missing plating or a lifted pad.
Observation
First checks
Controlled response
Solder connects neighboring lands
Placement, deposit volume, land spacing
Remove the bridge using a qualified rework method, then inspect for damage and shorts.
Solder beads up instead of wetting
Surface condition, flux compatibility, actual heat transfer
Identify the cause before reheating; replace damaged material when necessary.
Module sits tilted
Underside interference, uneven deposits, first tack position
Correct seating through controlled rework; do not force the board flat after solidification.
Land or plating lifts
Thermal exposure and mechanical force
Stop rework and assess conductor integrity against an approved repair disposition.
A matte joint is not automatically a cold joint, particularly with lead-free alloys. Evaluate wetting, connection geometry and evidence of disturbance against the specified acceptance criteria rather than demanding a uniformly shiny appearance.
How Should PCB-to-PCB Solder Joints Be Inspected?
Start with orientation and seating, then inspect every accessible joint for bridging, wetting, damage and contact with unintended conductors. Use magnification and lighting that reveal the module edge rather than hiding it behind reflections. Record the location of a suspect joint so rework and retest remain traceable.
Follow visual inspection with the electrical tests appropriate to the circuit. Check for unintended supply shorts before first power-up, then use a controlled power-on procedure and the agreed functional test. Continuity alone cannot show that a mechanically weak joint will survive service, and a powered module that starts once has not passed environmental reliability testing.
At EBest Circuit (Best Technology), our PCB assembly services include solder-paste inspection, AOI, X-ray inspection and functional testing. We use equipment including the SINIC-TEK S8080 3D SPI and UNICOMP AX8200 X-ray system. The inspection route depends on joint accessibility and the assembly: optical inspection cannot see through a module, and X-ray does not replace electrical or mechanical validation.
How Do You Keep Mechanical Loads off the Solder Joints?
A daughterboard can act as a lever. Connector insertion, cable pull, vibration and enclosure bending may load its soldered connections even when the module weighs very little. Place supports so these forces reach the chassis or carrier structure without being concentrated at the outermost joint.
Use the module’s approved mounting features, standoffs or an appropriate retention arrangement where the design requires them. Supports must respect electrical clearances, antenna keepouts and component height. An incorrectly positioned support can bow the board or impose stress instead of relieving it.
Thermal expansion also matters. Two boards with different temperatures, sizes or constructions can move relative to each other during operation. Evaluate the final supported assembly under its actual thermal and mechanical requirements. An unsupported desktop prototype is not evidence for a product exposed to repeated vibration or temperature cycling.
What Files Do We Need to Assemble Your PCB Module?
Send us the carrier fabrication data, assembly drawing, BOM, placement data and the module’s current drawing and assembly instructions. Identify customer-supplied modules and include their part revision, packaging and available moisture or reflow history. For a custom two-board connection, include both board drawings and the intended assembled position.
For PCB to PCB soldering, specify the required support arrangement, solder alloy, inspection criteria and functional-test procedure. If a joint will be hidden after enclosure assembly, identify when it must be inspected. These details let us evaluate the footprint and process before boards and modules reach the assembly line.
We provide PCB fabrication together with PCB assembly and soldering, component sourcing and engineering review matched to the project. Our placement capability includes SMD packages down to 01005 and BGA pitch down to 0.25 mm, subject to the specific layout and process review; these figures are not automatic minimums for a castellated module. Contact sales@bestpcbs.com with your drawings and quantities for a PCB-to-PCB assembly quotation.
PCB to PCB Soldering FAQs
How to Clean a PCB after Soldering?
Match the cleaning process to the flux and the module’s component restrictions. Residue trapped beneath a module may be difficult to remove and dry. Do not assume that an alcohol wipe cleans hidden areas or that every populated module can be immersed. Specify whether the assembly uses a qualified no-clean process or a validated cleaning and drying process.
Can a soldered PCB module be removed and reused?
Sometimes, but removal must stay within the module’s rework limits. Heating all required joints without prying is important. Inspect the module and carrier after removal, and do not assume that an apparently intact module remains suitable for reuse without the required checks.
Can conductive glue replace solder between two PCBs?
Not as a direct substitute in a solder-qualified footprint. Conductive adhesives have different curing, electrical, mechanical and environmental behavior. Using one requires a joint design and qualification appropriate to that material.
Does a continuity beep prove the connection is good?
No. It shows that the meter detected a conductive path under its test conditions. Parallel circuit paths can also affect the reading. A continuity check does not establish wetting quality, current-carrying performance or long-term mechanical reliability.
A pencil hardness test checks how a cured solder mask resists damage from a prepared graphite pencil. A useful result identifies the pencil grade, test method and damage endpoint. A dark graphite line is not automatically a scratch, and a hard surface does not prove that the coating is firmly bonded to the PCB.
What Does a Pencil Hardness Test Measure on Solder Mask?
The test gives an ordinal coating-hardness result: one grade is harder or softer than another under the chosen procedure. It does not measure the hardness of the copper or laminate underneath. It also does not provide a numerical bond strength, abrasion lifetime or insulation rating.
For PCB production, its value is detecting a change in the cured mask’s resistance to local mechanical damage. An unexpectedly soft result calls for investigation of the material, cure history and test setup. It is not enough by itself to identify the cause. Keep pencil testing on an approved coupon or sacrificial board area; a destructive test mark should not become an unexplained defect on a delivered board.
Which Pencil Hardness Test Standard Applies to PCBs?
IPC-TM-650 2.4.27.2 is the solder mask abrasion pencil method. ASTM D3363 covers film hardness by pencil testing, while ISO 15184 addresses paint and varnish film hardness. The purchase specification determines which pencil hardness test standard and revision apply. These references are not interchangeable simply because each uses a pencil.
An ASTM D3363 pencil hardness test requested on a drawing must retain that method’s conditions and endpoint. Do not substitute an IPC result without agreement. Equally, do not import a tester’s advertised 750 g loading into the IPC method as though the IPC document specified that number. Record the actual procedure, whether testing is manual or instrumented, and the applicable loading arrangement.
A pencil hardness test for coatings is useful across several industries, but a painted metal panel is not automatically representative of solder mask on a patterned board. Copper topography, mask thickness and sample support can change the local test conditions.
How Should Solder Mask Be Cured before Testing?
Test after the specified final cure and conditioning, not immediately after a tack-dry stage. Use the solder mask manufacturer’s current process sheet for the actual formulation, mixing ratio, coating thickness and cure sequence. An oven setpoint is not the same as the temperature experienced by the board; loading and thermal mass affect the heating history.
Keep the sample traceable to the production lot. Record the ink identity and batch, final-cure equipment or cycle reference, board-temperature evidence where required, cooling interval and test environment. A coupon cured separately from the boards may characterize that coupon rather than the delivered lot.
For FR4 PCBs, retain a representative mask-covered region and support it during testing. For metal-core PCBs, the metal-backed construction makes it especially important not to assume that the same oven setting produces the same board heating history. This distinction concerns curing the coating, not measuring aluminum hardness.
Do not keep extending the bake until a pencil result passes. Additional heat can affect other mask properties and downstream processing. A suspected under-cure requires a controlled review of the approved process window before any rework.
What Do the Pencil Hardness Grades Mean?
The pencil hardness test scale progresses from softer B grades through HB and F to harder H grades. Within the B series, a larger number is softer; within the H series, a larger number is harder. Thus 2B is softer than HB, and 3H is harder than H. These are ordered categories, not equal numerical intervals.
Grade group
Relative direction
Reporting implication
4B, 3B, 2B, B
Increasing hardness toward B
Soft grades still need the same tip preparation and procedure.
HB, F, H
Intermediate progression
F is a separate grade; do not replace it with HB or H.
2H, 3H, 4H, 5H, 6H
Increasing hardness toward 6H
A reported grade must identify the damage endpoint and method.
A 6H result is not twice as hard as 3H. Comparisons also depend on pencil manufacturer and batch. Keep a consistent, suitable pencil set for routine comparisons and agree on the set when resolving results between laboratories. The graphite core is commonly called pencil lead; it is not metallic lead.
How Should You Prepare the Pencil and Test Board?
A pencil hardness test kit needs a graded pencil set, suitable tip-preparation tools, firm sample support and adequate illumination for examining the track. A pencil hardness tester or guide can control geometry, but the fixture must match the selected procedure. A writing-sharp conical point is unsuitable for a method that requires a flat prepared end.
Expose and prepare the graphite according to the selected method. Flatten its end square to the pencil axis and inspect for chips or a rounded edge. Reprepare a worn or damaged end rather than carrying it through several measurements. Keep abrasive particles away from the mask because loose grit can create a misleading track.
Select a clean, level mask-covered area away from holes, exposed pads, legend ink and existing damage. On HDI PCBs, narrow mask dams and dense openings may leave no suitable uninterrupted track. An agreed representative coupon is preferable to forcing the test across pad edges. Record whether the mask is over copper or laminate, since those locations need not have identical film thickness or support.
How to Do a Pencil Hardness Test?
The pencil hardness test procedure must follow the method named in the inspection plan. For the IPC solder mask pencil method, the essential sequence is:
Place the coated sample on a firm, horizontal support.
Begin with the hardest pencil in the specified series and position it at 45 degrees to the surface.
Push away with consistent downward and forward pressure over the specified 6.4 mm stroke.
Examine the track, then progress to softer grades until the coating is no longer cut or gouged.
Record the hardest grade that does not cut or gouge, together with the method and observations.
Keep subsequent tracks separate from earlier damage. Recheck pencil preparation when a result is irregular. Apply the required repetition and acceptance rules from the agreed inspection instruction; do not invent a universal sample count. When a customer specifies an instrumented ASTM or ISO procedure instead, use that procedure rather than combining selected parts of different methods.
How Can You Tell a Scratch from a Gouge?
Examine the coating, not just the color of the track. Graphite can transfer to an intact surface. Remove residue only by a method compatible with the coating and test procedure, then inspect under controlled lighting and the specified viewing conditions. Aggressive rubbing or solvent cleaning can change the evidence.
Observation
What to check
How to record it
Dark line with no visible film disruption
Whether the mark is removable graphite rather than coating damage
Graphite transfer; record the post-cleaning observation
Persistent surface scoring
A real disturbed track remaining in the coating surface
Scratch observation, with grade and method-specific endpoint
Coating cut or displaced
Depth and extent of disruption; whether the underlying surface is exposed
Possible loss of adhesion as well as damage to the film
Describe the lifting and initiate a separate adhesion evaluation
A pencil scratch hardness test and a gouge assessment can produce different endpoints. Do not collapse them into one unlabeled number. The operational definitions in the specified standard control the result; the observation descriptions above help preserve evidence, not replace those definitions.
Photograph questionable tracks with scale, illumination and location identified. A close-up without the pencil grade or sample identity cannot resolve a dispute. If two inspectors disagree, compare the same prepared track under the same conditions before changing the process.
What Pencil Hardness Should Solder Mask Pass?
Use the contractual minimum for the approved solder mask system and stated test method. There is no defensible rule that every PCB mask, color and formulation must achieve the same grade merely because a different product’s data sheet lists it. A manufacturer’s typical result and your purchase acceptance limit are different pieces of information.
Write the requirement as a complete combination: material or approved system, method and revision, conditioning, endpoint and minimum grade. If the drawing only says “pencil hardness: 6H,” clarify the missing conditions before accepting or rejecting a lot. Hardness alone cannot establish solder resistance, chemical resistance or long-term electrical performance.
What Should a Pencil Hardness Test Report Include?
A useful report allows another inspector to understand the result without reconstructing the test from memory. Retain the individual observations, not just a final pass box.
Record
Required detail
Reason
Sample identity
Part/revision, lot, coupon or board number, test location
Connects the result to the correct production material
Coating condition
Mask formulation/batch, thickness evidence where required, cure and conditioning references
Separates process condition from pencil variation
Test setup
Method/revision, pencil make and grades, tip preparation, manual or fixture setup
Makes the result reproducible
Observations
Grades attempted, scratch/cut/gouge or residue, photographs and repeat results
Preserves the evidence supporting the endpoint
Disposition
Specified limit, result, inspector/date and any nonconformance reference
Explains why the lot passed, was held or required review
For example, a demonstration record might state “3H: no cut; 4H: cut observed; endpoint 3H under the recorded method.” That example explains reporting only; it is not a BestPCBs production result or a recommended acceptance limit. If the hardest available pencil causes no qualifying damage, identify the upper test limit rather than claiming an untested higher grade.
Why Can Pencil Hardness Results Differ?
First check the measurement conditions: pencil brand or batch, worn edge, angle, pressure, track position, board support and interpretation of graphite residue. Retesting without controlling these variables can create a second number without explaining the first.
Then compare the actual coating conditions: formulation, mixing and storage history, thickness, cure profile and conditioning interval. Keep samples separated by lot and location. A repeatable low result confined to one cure batch points to a different investigation from inconsistent results on adjacent tracks made with a chipped pencil.
Hold affected material for the agreed quality disposition when the requirement is not met. Any approved corrective action should be followed by verification of the relevant properties, including adhesion when applicable. Passing after additional heat does not retrospectively validate an uncontrolled rework cycle.
How Is Pencil Hardness Different from Solder Mask Adhesion?
Pencil hardness concerns resistance to local mechanical damage. Adhesion concerns the coating’s attachment to the surface beneath it. A coating can be hard yet poorly bonded, or well bonded but softer than the required pencil grade. Neither result replaces the other.
Adhesion evaluation uses its own specified preparation, tape or other test arrangement, exposure conditions and acceptance criteria. Do not call a pencil track an adhesion test, and do not apply a generic cross-cut method to a PCB without checking the governing specification. Keep the two results separate in the inspection record, even when both are requested for the same lot.
At EBest Circuit (Best Technology), our PCB testing capability includes solder mask peel-strength testing. For an order requiring a pencil hardness test as well, send the specified method, minimum grade and reporting requirements with the fabrication data to sales@bestpcbs.com. We can review the required inspection scope before confirming the order, without treating adhesion testing as proof of pencil hardness.
Pencil Hardness Test FAQs
Which pencil is softer, HB or 2B?
2B is softer than HB. Keep the grading sequence consistent and do not substitute art pencils of unknown equivalence for the specified test set.
Does 9H pencil hardness mean Mohs hardness 9?
No. Pencil grades and the Mohs mineral-hardness scale are different systems. A coating’s pencil grade cannot be converted into a mineral-hardness number.
Can a pencil hardness test for paint qualify PCB solder mask?
Not by itself. The coating chemistry, substrate, conditioning and acceptance requirements must match the PCB application. A paint-panel result does not establish compliance of a different solder mask lot.
Where should the test method come from?
Use the controlled revision required by the purchase specification and obtain standards through an authorized source. An unofficial pencil hardness test PDF or a summary of a Wolff Wilborn pencil hardness test is not a substitute for the governing document.
At EBest Circuit, we support component sourcing, PCB fabrication, and assembly. Send your BOM, Gerber files, and assembly requirements to sales@bestpcbs.com for a quotation, including manufacturer part numbers and approved resistor alternatives where available.
A resistance measurement should be taken with power removed and stored charge discharged; parallel circuit paths can make an installed resistor read below its individual value.
A suitable replacement must match resistance and meet the required tolerance, power, voltage, temperature, and footprint specifications.
What is a 1k ohm resistor?
The letter k means kilo, or one thousand, so a 1k resistor has a nominal resistance of 1,000 ohms. It belongs to a family of fixed-value components used to control current and establish voltage or timing relationships.
Keep the component value separate from its PCB reference designator. A label such as R12 identifies the resistorâs position in the circuit. The schematic or BOM supplies its resistance and other specifications.
The 1k resistor color code 5 band sequence follows the same digit-and-multiplier principle. Five-band resistors use three significant digits followed by a multiplier and tolerance band. Brownâblackâblack gives 100; the next brown band multiplies that by 10.
These ranges describe initial tolerance under the specified reference conditions. Operating temperature and long-term drift are separate considerations.
Read the bands with the tolerance band at the end; its spacing often helps establish direction. Body color is not a dependable resistance identifier. For faded or heat-damaged markings, confirm the value against documentation and an isolated measurement.
Small chip resistors may have no readable marking. For these components, use the reel label, manufacturer part number, BOM, and placement records. A top-side photograph alone may be insufficient to distinguish several values in the same package.
How Do You Test a 1k Resistor with a Multimeter?
Use resistance mode and measure the component with the circuit unpowered. For a dependable component-level result, isolate the resistor from other conductive paths.
Remove circuit power. Disconnect batteries, external supplies, and other sources that could energize the board.
Discharge stored energy. Use an appropriate discharge method and verify that residual voltage has fallen before measuring resistance.
If a reading remains unstable, inspect probe contact, residual charge, and semiconductor paths before replacing the component. Document the measured value and test conditions when the result will be used for a production or repair decision.
How Much Current and Power Does a 1k Resistor Carry?
Current depends on the voltage across the resistor, while heating depends on the power dissipated in it.
Choose the power rating from the highest expected dissipation and the allowable dissipation at the actual operating temperature. Then select a package that fits the PCB and can meet those conditions.
Package size does not establish a universal wattage. Resistor families with the same body dimensions can have different ratings, termination designs, and mounting requirements.
Pulse amplitude, duration, repetition, and waveform
Supports startup and transient evaluation
Temperature coefficient
Required ppm/°C range
Controls resistance change with temperature
Package and footprint
Imperial/metric size, pads, or lead spacing
Ensures mechanical and assembly compatibility
Resistor technology
Thick film, thin film, metal film, or another suitable type
Affects stability, noise, and pulse behavior
Procurement details
Manufacturer part number and approved alternatives
Keeps repeat builds consistent
For reference, the standard-power ratings in Vishayâs D/CRCW e3 family include 0.10 W for 0603, 0.125 W for 0805, and 0.25 W for 1206 under the datasheet conditions. These are specific product-family examples, not ratings that apply to every resistor in those sizes.
Consider a hypothetical 0.25 W resistor whose datasheet specifies linear derating from full power at 70°C to zero at 155°C. At 100°C, its allowable power would be:
0.25 Ă (155 â 100) Ă· (155 â 70) â 0.162 W
The earlier 12 V example dissipates 0.144 W nominally, leaving limited margin under those assumed conditions. A larger rating or a different circuit arrangement may provide a more suitable operating point.
Here, VF is the LEDâs forward voltage and Vdriver is any relevant voltage drop in the driving transistor or output stage.
With an assumed 5 V supply, 2 V LED forward voltage, and negligible driver drop:
ILED = (5 â 2) Ă· 1,000 = 3 mA
The resistor sees 3 V, so its dissipation is:
PR = 3ÂČ Ă· 1,000 = 9 mW
This illustrates why the supply voltage should not automatically be used as the resistor voltage. Part of the supply appears across the LED.
For a second example, a 12 V supply and a 2 V LED forward voltage produce approximately 10 mA and 0.10 W in the resistor. Compare that dissipation with the selected resistorâs derated rating.
Check maximum supply voltage, minimum LED forward voltage, resistor tolerance, and the driverâs current capability when calculating the highest current. For minimum brightness, evaluate the opposite limits and the LEDâs specified light output.
When Is a 1k Pull-Up or Pull-Down Resistor Suitable?
For a 3.3 V pull-up connected to an output held near ground:
I â 3.3 Ă· 1,000 = 3.3 mA
The driving pin must support that current while maintaining a valid logic-low voltage. Account for any additional pull-ups already connected to the same net.
On an open-drain bus, resistance also affects rise time. A lower pull-up resistance charges bus capacitance faster, but increases the low-state current requirement. TIâs IÂČC guidance calculates a lower resistance limit from output sink capability and an upper limit from rise time and bus capacitance.
For a simple RC rise measured from 30% to 70% of the supply:
For a static input or battery-powered circuit, a higher resistance may provide adequate bias with lower current consumption. Select the value from leakage, noise exposure, timing, and power requirements.
How Do Tolerance and Temperature Affect Circuit Accuracy?
Tolerance describes the initial resistance range. Temperature coefficient describes how resistance changes with temperature, commonly expressed in parts per million per degree Celsius.
That is approximately 0.5% of nominal resistance. Initial tolerance, self-heating, and long-term drift are separate contributors to the total error budget.
A different resistance is suitable only when the resulting circuit behavior remains acceptable. A change that works in an indicator circuit may alter an analog gain, timing interval, or protection function beyond its intended range.
For a production replacement, retain the required resistance and review tolerance, power, working voltage, temperature coefficient, pulse behavior, and footprint. A higher wattage part can be useful if its dimensions and other properties fit the design.
At EBest Circuit, providing approved manufacturer part numbers and alternatives helps us coordinate sourcing with the assembly BOM. Identify any resistor positions with critical accuracy or pulse requirements so those limits remain visible during substitution review.
FAQs About 1k Resistors
Q1: Does a 1k resistor have polarity?
A1: A standard two-terminal fixed resistor is nonpolarized and can function electrically in either orientation.
Q2: Should a good 1k resistor make a continuity tester beep?
Q3: Does the sixth band on a resistor add another resistance digit?
A3: In a common six-band system, the sixth band indicates temperature coefficient; confirm the marking convention for the selected series.
Q4: Can a 1k resistor replace a fuse?
A4: A standard resistor does not provide a fuseâs specified interruption behavior; use the protection component required by the circuit design.
Q5: Does a blue resistor body always mean 1% tolerance?
A5: Body color varies between products, so establish tolerance from the bands, part number, or datasheet.
Q6: Can a resistor pass a resistance test and still fail during operation?
A6: Yes, a low-power resistance measurement may miss faults that appear under heat, voltage stress, or mechanical movement.
Q7: Is a 1k resistor suitable for every transistor base connection?
A7: The appropriate base resistance depends on drive voltage, required collector current, switching conditions, and the transistorâs specified behavior.
How Can EBest Circuit Support Your PCB Assembly?
At EBest Circuit, we support PCB fabrication, component sourcing, and assembly for prototypes and production builds. Share your component requirements early so we can review BOM completeness, resistor footprints, sourcing options, and the inspection or testing needed for your board.
For a quotation, send your Gerber files, BOM, pick-and-place file, assembly drawings, quantities, and test requirements to sales@bestpcbs.com. Include approved alternatives and any critical resistance tolerance, power, temperature, or pulse requirements to help us prepare the build accurately.
PCB layer registration is the positional alignment of copper features on different layers of a printed circuit board. If an inner-layer pad shifts away from its intended location, a drilled hole can leave too little copper around the barrel, even when the external artwork looks correct. Reliable multilayer fabrication therefore depends on controlling both copper-layer alignment and the relationship between the laminated stack and the drilling coordinates.
What Is the Difference Between Layer Registration and Hole Registration?
Layer-to-layer registration compares copper features on different layers; hole registration compares a hole with the copper features it must connect to or avoid. The two are related, but they are not interchangeable measurements.
Registration check
Features being compared
What an error can affect
Layer-to-layer
Copper targets, pads or patterns on separate layers
Pad overlap, coupled routing and local clearances
Drill-to-copper
Drilled hole center and copper pad or clearance center
Remaining annular ring, breakout or unintended plane contact
Solder-mask-to-copper
Mask opening and surface pad
Exposed copper and mask coverage
Component placement
Component terminals and outer-layer land pattern
Assembly alignment, not internal copper alignment
For PCB layer to layer registration, the drawing must identify the reference layer or datum and the features being measured. Comparing every layer with a common reference is not the same as reporting the largest separation between any two layers. A board can meet one stated limit and fail another if the measurement definitions differ.
What Causes PCB Layers to Become Misaligned?
Misalignment can begin before lamination and change during pressing. Etched cores can change dimensions as copper is removed, while temperature, moisture condition, material direction and processing history affect dimensional stability. Tooling wear, incorrect lay-up orientation or movement during bonding can add further error.
The shape of the error matters as much as its maximum value:
Observed pattern
Possible explanation to investigate
Useful comparison
Similar offset at several targets
Translation or datum mismatch
Target coordinates against the same origin
Offset changes direction across the panel
Rotation
Targets near opposite panel edges
Offset grows with distance from the center
Scale change
X and Y spans before and after processing
Different local errors remain after global alignment
Nonuniform distortion
Multiple targets across the usable panel
These patterns guide investigation; they do not identify the root cause by themselves. For example, shifting the drilling origin can reduce a uniform offset but cannot remove local distortion already locked into a laminated board.
How Does Layer Misregistration Affect Annular Ring?
Misregistration reduces the narrowest copper ring around a hole. For a circular pad and circular drilled hole, a simple geometric estimate is:
Minimum remaining ring = (minimum pad diameter â maximum drilled-hole diameter) / 2 â center offset
The diameters and offset must describe the same manufacturing stage. A finished plated-hole diameter is smaller than the drilled opening; substituting it without accounting for plating can overstate the copper margin.
Consider a 0.60 mm pad and a 0.30 mm drilled opening, ignoring diameter tolerances for this example:
Center offset
Narrowest remaining ring
0.00 mm
0.150 mm
0.05 mm
0.100 mm
0.10 mm
0.050 mm
0.15 mm
0.000 mm: geometric tangency
These values illustrate geometry, not an acceptance specification. Etched pad size, drill size variation, layer movement and drilling position all consume margin. Internal clearances matter too: a shifted hole can approach a plane that it should not contact, even if its connected pad retains copper.
What PCB Layer Registration Tolerance Should You Specify?
Specify the tolerance together with its reference, measurement method and affected layer pairs. There is no single PCB registration tolerance that can be applied to every stack-up simply by counting layers or naming an acceptance class.
For a PCB layer to layer registration tolerance, clarify:
Whether the limit is layer-to-layer, drill-to-pad, or a combined manufacturing allowance.
Whether it is a radial displacement or separate X and Y limits.
Which targets, layers and panel locations are measured.
Whether the result applies before lamination, after lamination or after drilling.
The applicable specification revision, product class and drawing requirements.
An X/Y allowance is not automatically a radial allowance. If both axes permit 0.05 mm simultaneously, the resulting diagonal displacement can reach approximately 0.071 mm. If the intended limit is a 0.05 mm radius, the drawing should say so.
PCB layer registration tolerance must leave adequate copper and clearance at the actual minimum geometry. For Class 2 boards, layer-to-layer registration must be evaluated against the applicable acceptance criteria and the agreed fabrication requirements together. The geometric example above is not an IPC limit, and a class designation alone is not a complete positional tolerance specification.
How Are Inner Layers Aligned Before Lamination?
Inner-layer registration uses features tied to the copper artwork, followed by a controlled method of positioning the cores in the lay-up. Optical registration equipment can locate etched targets and establish tooling holes relative to the actual pattern rather than relying only on the cut edge of the laminate.
Inspection before bonding is equally important. Inner-layer AOI compares the visible etched pattern with the design data to detect defects while the copper is accessible. Correct layer identity, orientation and sequence must then be maintained through lay-up. A perfectly aligned but incorrectly oriented core is still wrong.
Tooling holes and optical targets perform different jobs: one physically locates material; the other provides a measurable reference to the artwork. Their size, shape and position belong to the fabrication tooling scheme and should not be copied from an unrelated board.
How Does Lamination Affect Layer Alignment?
Lamination subjects the lay-up to heat, pressure and resin flow. Material movement during this stage can alter the alignment established at loading. Dimensional compensation therefore needs to reflect the selected laminate, copper distribution and process history, rather than one scaling factor used for every job.
In multilayer PCB design, stack-up symmetry and balanced copper distribution help control dimensional behavior and warpage. They do not guarantee registration on their own. A multilayer PCB stackup also needs consistent material orientation, compatible cores and prepregs, and a controlled bonding sequence.
For an 8 layer PCB, for example, reviewing all internal cores and their target positions provides more information than checking only the two outer layers. Common PCB stackups provide a starting point, but the approved material construction and panel arrangement determine the actual manufacturing route. Sequentially laminated structures require attention to the dimensional changes accumulated over multiple bonding cycles.
How Is X-Ray Used to Check PCB Layer Registration?
X-ray inspection can reveal internal copper reference features after lamination, when an optical camera can no longer see them directly. A suitable target design and measurement setup allow the positions of internal features to be compared and can support the choice of drilling references.
The result depends on what the image separates clearly. Overlapping targets, unsuitable geometry or insufficient resolution can make individual layers difficult to distinguish. Reporting a single position from an ambiguous image does not prove that every layer is within tolerance.
X-ray-guided drill registration can optimize drilling relative to the bonded copper stack. It cannot move copper layers that are already laminated together. If different layers have shifted in different directions, the selected drill position may be a compromise; inadequate remaining margins still require disposition.
What Can AOI, Microsections and Electrical Testing Confirm?
These methods answer different questions. None should be treated as a complete substitute for the others.
Method
Useful evidence
Important limitation
Inner-layer AOI
Visible copper pattern defects before bonding
Does not show final post-lamination layer positions
X-ray registration measurement
Internal target positions in the laminated stack
Requires identifiable targets and suitable resolution
Microsection
Local hole-wall, pad and interconnection geometry
A selected section may not intersect the worst offset direction
Electrical testing
Opens and shorts covered by the test
Does not quantify remaining annular-ring margin
When a registration concern is investigated, identify the panel, coupon location, layer pair, datum and measurement direction. A microsection through one hole at one location is local evidence; it should not silently become a claim about every hole on the panel. Likewise, passing continuity does not show how much manufacturing margin remains before breakout.
How Can PCB Design Reduce Registration Risk?
Provide room for the expected manufacturing variation before routing becomes too dense to change. The most useful multilayer PCB design guidelines connect pad and clearance geometry to the proposed fabrication route:
Review pad sizes and antipad clearances using the drilled-hole requirements, not only the finished-hole size.
Keep the artwork, drill files, layer order and stack-up revision consistent.
Evaluate narrow internal clearances and small capture pads early in DFM.
Agree on controlled features and registration acceptance before tooling is finalized.
Recheck the margins if material, panelization, via construction or lamination sequence changes.
Our multilayer PCB manufacturing supports FR4 constructions up to 32 layers, subject to the selected structure and engineering review. Layer count alone does not define the achievable registration tolerance.
For HDI PCB manufacturing, small capture features and sequential build-up make registration especially relevant. We support fine-line HDI designs down to 2/2 mil under applicable manufacturing conditions; this line/space capability is not a promise of a particular layer-position tolerance.
Layer alignment can also matter to impedance-controlled PCBs, particularly where coupling depends on the overlap of conductors on different layers. A simple shift over a wide continuous reference plane does not have the same effect as a shift between broadside-coupled traces. Review the actual structure rather than assuming every offset produces the same impedance change.
What Files Are Needed to Review Layer Registration?
At EBest Circuit (Best Technology), we provide PCB fabrication and DFM support. Send us the complete fabrication data, layer order, proposed stack-up, drill information and drawing tolerances so we can evaluate the construction before production.
For a specific layer-registration requirement, include the affected layers or vias, intended datum, acceptance criteria and any requested inspection records. If a previous lot showed an offset, its measured coordinates and sample location are more useful than an unscaled photograph alone. We will confirm feasible requirements and the agreed inspection scope for the proposed board; do not assume a generic capability value applies to every layer pair.
PCB Layer Registration FAQs
1. Are SMT fiducials the same as inner-layer registration targets?
No. SMT fiducials locate a board or component region for assembly equipment. Inner-layer targets support fabrication alignment or measurement. Their purposes and manufacturing stages differ, even if both use recognizable copper shapes.
2. Can an electrical test pass when layer registration is poor?
Yes. A connection may remain continuous while its annular-ring margin is reduced. Electrical test results and geometric acceptance need to be evaluated separately.
3. Can registration be checked on a finished assembled PCB?
Some internal features may be examined with suitable X-ray equipment, but components, shields and overlapping copper can limit interpretation. Fabrication targets or coupons and production-stage records are usually more useful for investigating a specific layer-pair offset.
4. Does adding more copper to a pad always solve misregistration?
No. A larger pad can improve hole capture, but it can reduce spacing to neighboring copper and change routing or electrical behavior. Correct the error source and review both connection margin and isolation clearance.
For a PCB layer registration review, send your fabrication package and critical feature requirements to sales@bestpcbs.com. We can assess the multilayer construction and clarify the manufacturing and inspection requirements before you release the board.
PCB microetching removes a controlled, shallow amount of exposed copper to prepare its surface for a subsequent manufacturing step. It helps remove surface oxidation and establish a suitable copper surface without stripping away the conductor. For a finished board, the important balance is adequate surface preparation without consuming too much of the copper needed for the circuit.
What Is PCB Microetching?
A copper microetch chemically dissolves the outermost copper surface. Micro etching PCB copper can also develop a microscopic texture that helps the next coating or deposited metal attach, depending on the chemistry. The amount removed is small compared with the full copper thickness, but it still belongs in the manufacturing copper budget.
The terms microetching, micro etching and micro etch describe this surface-preparation operation. A microetch PCB process does not mean manufacturing an unusually small board. Its purpose is to prepare exposed copper, whether that copper is on a panel, a pad or an accessible interconnection surface.
How Does Microetching Differ from PCB Etching?
Pattern etching creates the circuit by removing unwanted copper through the foil thickness. Microetching prepares copper that generally needs to remain. Confusing the two can lead to an inappropriate dwell time or an incorrect assumption that a shiny surface proves the circuit dimensions are unchanged.
Process
Main task
What must remain controlled
Pattern etching
Remove unprotected copper to form traces and spaces
Conductor width, spacing and undercut
Microetching
Remove a shallow surface layer from exposed copper
Copper loss, surface condition and uniformity
Cleaning/degreasing
Remove oils and other process contamination
Cleanliness and compatibility with following steps
Desmear
Remove drilling-related resin residues
Hole-wall and interconnection cleanliness
Some proprietary products combine cleaning and microetching. That does not make every microetch bath a substitute for degreasing, and copper microetching alone does not replace resin desmear.
Where Is Microetching Used in PCB Manufacturing?
Microetch treatments can appear before photoresist application, selected plating operations and final surface-finishing steps. The required surface is determined by what comes next: a resist must adhere, a deposited metal must form a sound interface, and a final finish needs properly prepared exposed copper.
These are separate process locations, not instructions to send every board through the same treatment repeatedly. Masked areas, exposed pads and plated features can have different exposure histories. For our FR4 PCB manufacturing, the drawing's finished copper and conductor requirements are the relevant product targets; the process route must deliver those targets after all copper-removal steps.
Which Chemicals Are Used for Copper Microetching?
Common commercial approaches include stabilized sulfuric-acid/hydrogen-peroxide systems and persulfate-based systems. Proprietary additives influence bath behavior and the resulting surface. Selecting a chemistry therefore involves compatibility with the next process, available equipment and the acceptable copper loss, not just choosing an oxidizer name.
Chemistry family
Practical consideration
Sulfuric acid with stabilized hydrogen peroxide
Oxidizer condition, acid balance and copper loading affect process control
Persulfate-based microetch
Concentration, bath loading and treatment conditions influence removal
Proprietary surface-preparation formulations
Surface morphology may differ even at a similar removal depth
An operating temperature or copper-loading limit belongs to a specific product and line setup. Transferring a value between different formulations can change both removal and surface texture. Production chemistry also requires the specified handling, ventilation and waste-treatment controls; an acid-and-oxidizer mixture is not a general workshop cleaning recipe.
How Much Copper Should Microetching Remove?
There is no single removal depth that fits every PCB process. The target must provide sufficient preparation while preserving the minimum required copper and feature dimensions. A thin starting copper layer has less allowance for repeated treatments than a substantially thicker layer.
Three quantities are easy to confuse:
Quantity
Typical unit
What it describes
Copper removal depth
Micrometers, written as ”m
Average thickness dissolved during a treatment
Etch rate
”m/min
Removal per unit time under stated conditions
Surface roughness
A defined parameter such as Ra or Rz, in ”m
Profile variation, not the amount of copper dissolved
Finished copper thickness
”m
Copper remaining after the relevant manufacturing operations
For example, a measured rate of 1 ”m/min over a 30-second exposure predicts 0.5 ”m removal only while the rate and exposure conditions remain applicable. This arithmetic is not a recommended process setting. A roughness value of 0.5 ”m is not interchangeable with 0.5 ”m of copper removal.
How Is the Microetch Rate Measured?
One approach uses the mass loss of a copper coupon with a known exposed area. The coupon is weighed before treatment and again after the prescribed rinsing, drying and conditioning. Residual water, removable contamination or a change in the laminate's moisture content can distort a small mass difference, so sample preparation must be repeatable.
For a measurement in which the lost mass is copper:
Average removal (”m) = 10,000 Ă copper mass loss (g) / [copper density (g/cmÂł) Ă total exposed copper area (cmÂČ)]
Average etch rate (”m/min) = average removal (”m) / exposure time (min)
Using a copper density of 8.96 g/cmÂł, a hypothetical mass loss of 0.0896 g over 100 cmÂČ of exposed copper gives 1 ”m average removal. If treatment lasted one minute, the average rate is 1 ”m/min. These are calculation inputs, not our factory test results.
Count all exposed copper surfaces. If two faces are each 50 cmÂČ, their combined area is 100 cmÂČ, before considering any other exposed copper. Using only one face would double the calculated depth incorrectly. Coupon copper type, pretreatment and exposure must also be representative: foil and plated copper need not dissolve at identical rates.
The result is an average. It cannot prove how much copper was removed at one narrow trace edge or at the bottom of a blind microvia.
What Changes the Microetch Rate?
Temperature and dwell time are only part of the answer. Bath composition, dissolved copper, solution movement and the condition of the incoming copper can change the result. A conveyor speed establishes nominal exposure, but it does not establish that every nozzle is delivering the same flow.
When removal changes unexpectedly, a useful troubleshooting sequence is:
Confirm the coupon area, timing, weighing and drying procedure before adjusting the bath.
Compare actual bath temperature and chemistry analysis with the approved operating range.
Check loading, replenishment history and the incoming surface condition.
Inspect spray coverage or immersion circulation, including panel placement.
Repeat the measurement under the corrected conditions and compare different positions where necessary.
Changing several variables together makes the cause difficult to identify. Increasing dwell time may compensate for a weak average rate while leaving a poor-flow location inadequately treated.
What Happens If Copper Is Overetched or Underetched?
Insufficient preparation can leave an unsuitable interface for the next operation. Excess removal can reduce the available copper thickness or alter exposed conductor geometry. Neither condition should be diagnosed from copper color alone.
Observation
Checks that help narrow the cause
Poor resist or coating adhesion
Incoming cleanliness, preparation, application and cure conditions
Uneven copper appearance
Wetting, flow distribution, contamination and panel exposure
Excess coupon mass loss
Timing, area calculation, temperature and bath analysis
Narrow traces or thin copper after processing
Accumulated removal across the route, not only the last bath
A plating-interface concern
Surface preparation together with activation and plating conditions
These observations are not one-to-one proof of a microetch fault. For example, adhesion can fail because of contamination introduced after preparation. Adding another microetch cycle without identifying the cause also adds copper loss and may not correct the defect.
How Does Microetching Affect HDI and Fine-Line PCBs?
Fine conductors and thin copper leave less room for unplanned removal. Our HDI PCB manufacturing supports fine-line designs, with line/space capability down to 2/2 mil on suitable constructions. The final stack-up, copper thickness and feature combination still require engineering review; that capability is not a universal microetch allowance.
Microvia geometry creates a further issue: a flat coupon is easier for chemistry to reach than a recessed target pad. Solution exchange and local preparation must be evaluated for the actual feature, rather than inferred solely from a panel-surface measurement.
For impedance-controlled PCBs, finished conductor geometry affects impedance, while copper roughness can also contribute to conductor loss at high frequency. âRougher is betterâ is therefore not a complete design rule. Surface preparation must suit adhesion needs without ignoring the specified copper profile and electrical design.
Why Do Rinsing and Transfer Time Matter?
Carryover can contaminate the next bath, and exposed prepared copper can change during an uncontrolled wait. Rinsing, drainage and transfer conditions are part of the process route, not housekeeping after the important work is finished.
Whether a board proceeds wet-to-wet or is dried depends on the next operation. A coupon dried for weighing is not evidence that production boards should always be dried at that point. Likewise, a delay suitable for one finish or resist process cannot automatically be used for another.
How Can Microetching Quality Be Checked?
A useful check links the bath result to the board: verify removal, inspect surface uniformity, and confirm the relevant downstream result. Adhesion, finished dimensions or plating-interface examination answer different questions and should not be replaced by a single average mass-loss number.
The comparison needs traceable conditions: coupon type and exposed area, exposure time, bath condition, measurement method and panel position. If a thin-copper product is under review, compare its remaining copper with the drawing requirement. If an adhesion issue is under review, examine the relevant coating or interface rather than concluding that a passing thickness measurement resolves it.
At EBest Circuit (Best Technology), we manufacture custom PCBs to the agreed board requirements. Send your stack-up, finished copper thickness, minimum line/space and surface-finish requirements to sales@bestpcbs.com for a manufacturing review. Include any special copper-profile or interface requirements so that pcb microetching and the surrounding process steps are considered against the actual circuit, rather than an isolated bath setting.
PCB Microetching FAQs
How to Do Microetching on a PCB?
Use the qualified preparation sequence for the selected chemistry and next manufacturing step: prepare the incoming surface, apply controlled exposure, rinse as specified and transfer under the defined conditions. A production procedure must specify its operating limits and checks; the mass-loss example above is not a bath recipe.
Can mechanical brushing replace microetching?
Not automatically. Brushing acts mechanically on accessible surfaces; a chemical process acts on wetted copper. Substitution requires confirming surface condition, dimensions and compatibility with the next operation, particularly where a brush cannot reach.
Is microetching the same as black oxide treatment?
No. Both can be associated with copper surface preparation, but black oxide treatment produces a conversion layer for bonding purposes. Microetching removes copper. An oxide-alternative process may include controlled etching, yet its full chemistry and qualification cannot be reduced to the word microetch.
Does a microetch result prove that the finished PCB is acceptable?
No. A pcb microetching result describes one part of fabrication. Finished-board acceptance still depends on the specified dimensions, electrical testing, finish and other applicable product requirements.
The esp32 pinout identifies a boardâs power, ground, control and GPIO connections. On a classic ESP32-WROOM development board, GPIO21 and GPIO22 are common I2C choices, GPIO1 and GPIO3 serve UART0, and GPIO34â39 are input-only at chip level. These are 3.3 V logic connections, not 5 V-tolerant inputs. The physical header arrangement depends on the board: a 30-pin DevKit-style board is not interchangeable with a 38-pin ESP32-DevKitC V4. This guide uses the classic ESP32-WROOM/DevKitC family as its reference and separates it from ESP32-S3 and ESP32-C3, which require different pin maps.
Key Takeaways
Match the exact chip, module and board revision before connecting wires or creating a PCB footprint.
GPIO numbers identify signals; they are not module-pad numbers or header-position numbers.
Classic WROOM boards reserve GPIO6â11 for flash. GPIO34â39 cannot drive outputs or provide internal pull-up/down resistors.
GPIO0, 2, 5, 12 and 15 are classic ESP32 strapping pins. External circuits must not impose incorrect levels during reset.
Use ADC1 inputs for analog measurements that must coexist with Wi-Fi on the classic ESP32.
I2C, SPI and UART assignments depend on firmware and board configuration; example pin choices are not universal hardware requirements.
A custom PCB also needs a stable supply, antenna clearance, programming access and functional testingânot just a copied pinout.
Which ESP32 Pinout Diagram Matches Your Board?
The correct ESP32 pinout diagram matches the module marking, development-board model and PCB revisionânot just the word âESP32â or the number of header pins.
Hardware you have
Reference to use
What changes
ESP32-WROOM module
Exact module datasheet and land pattern
Module pads, ground pad and antenna area
ESP32-DevKitC V4 with WROOM
DevKitC V4 schematic and J2/J3 header tables
38 header positions, USB bridge and regulator
30-pin DevKit-style board
That board manufacturerâs drawing
Header order, omitted signals and power labels
ESP32-WROVER development board
WROVER module plus board schematic
PSRAM reserves GPIO16 and GPIO17
ESP32-S3 or ESP32-C3 board
Matching S3/C3 module and board documentation
GPIO map, USB functions, memory allocation and boot pins
Count pins on both sides, read the metal-shield marking, and compare the silkscreen beside the connector. A USB-C socket alone does not identify the chip family. If you are still choosing a development platform, our ESP32 vs Arduino comparison covers that separate decision.
At EBest Circuit, we support custom PCB fabrication and assembly. When a development-board prototype moves into a product, our PCB design and manufacturing review should work from the selected moduleâs documentation and the released schematic, not a generic internet pin diagram.
How Do GPIO Numbers Differ from Physical Pin Numbers?
A GPIO number identifies an ESP32 signal, while a physical pin number identifies its position on a particular chip, module or connector.
For example, GPIO21 is connected to position 6 on the DevKitC V4 J3 header. That does not make it âpin 6â in firmware. Code that selects GPIO21 must use the GPIO identifier expected by the software framework.
Chip pin: a terminal on the ESP32 IC package.
Module pad: a solder connection on the WROOM module.
Header position: a connector contact on a development board.
Keep GPIO net names consistent between the schematic and firmware. For a custom carrier board, also check the viewing direction: a bottom-view drawing can reverse the apparent left/right order.
ESP32 Pinout Reference
For a classic WROOM-based board, GPIO18, 19, 21, 22, 23, 25, 26, 27, 32 and 33 are useful starting choices for general digital I/O, provided the board has not already assigned them to another circuit.
Function
Classic ESP32 GPIOs
Selection rule
General digital I/O
18, 19, 21, 22, 23, 25, 26, 27, 32, 33
Check peripheral conflicts and connected hardware
Additional digital I/O
4, 13, 14, 16, 17
13/14 can serve JTAG; 16/17 depend on module memory use
Input-only GPIOs
34â39 at chip level
No output drive or internal pull-up/down; 37/38 are not exposed on the DevKitC reference headers
Boot strapping
0, 2, 5, 12, 15
Check external pull resistors and reset-time levels
Flash interface
6â11 on WROOM
Do not assign to external peripherals
UART0
TX: 1; RX: 3
Normally used by the programming/debug connection
ADC1 exposed on DevKitC
32, 33, 34, 35, 36, 39
Preferred for analog sensing while Wi-Fi operates
DAC outputs
25, 26
Classic ESP32 only; do not assume every ESP32-family chip has these DACs
âGeneral I/Oâ does not mean every pin is suitable for every job. A pin used by an SPI display cannot simultaneously serve an unrelated sensor, and a GPIO should not directly power a relay or motor. Use an appropriate driver circuit for the load.
How Do 30-Pin and 38-Pin ESP32 Boards Differ?
The difference is the development boardâs exposed connections and physical layout; it does not mean the 38-pin board has eight more usable GPIOs.
A typical ESP32 pinout 30 pin drawing describes a specific compact DevKit-style board. The official ESP32-DevKitC V4 has two 19-position headers, including supply, ground, control and flash-related contacts. Do not transfer a wire by its position from one format to the other.
The table below is a connector lookup for ESP32-DevKitC V4 with a WROOM module. Numbers are J2/J3 connector positions from Espressifâs header tables, not GPIO numbers. Confirm orientation against the board before wiring.
Position
J2 label / signal
J3 label / signal
1
3V3
GND
2
EN
IO23
3
VP / GPIO36
IO22
4
VN / GPIO39
TX / GPIO1
5
IO34
RX / GPIO3
6
IO35
IO21
7
IO32
GND
8
IO33
IO19
9
IO25
IO18
10
IO26
IO5
11
IO27
IO17
12
IO14
IO16
13
IO12
IO4
14
GND
IO0
15
IO13
IO2
16
D2 / GPIO9 â flash
IO15
17
D3 / GPIO10 â flash
D1 / GPIO8 â flash
18
CMD / GPIO11 â flash
D0 / GPIO7 â flash
19
5V
CLK / GPIO6 â flash
Which ESP32 Pins Need Special Care?
Flash connections, input-only pins, strapping pins and module-specific PSRAM connections need review before they are connected to external hardware.
GPIO6â11: leave the WROOM flash bus alone, even when the board exposes those contacts.
GPIO34â39: use for inputs only. A floating switch input needs an external bias resistor.
GPIO0: holding it low during reset selects serial download mode under the appropriate boot configuration.
GPIO12: a high reset-time level can select 1.8 V for VDD_SDIO unless overridden by configuration. That can prevent a board using 3.3 V flash from booting.
GPIO16/17: available on the WROOM-based DevKitC reference, but reserved on WROVER variants.
GPIO4 is not one of the classic ESP32âs five strapping pins. It can still be occupied by board hardware, so ânot a strapâ is not the same as âunused.â Check boot behavior with the peripheral attached and powered, not only with an unloaded board.
Can ESP32 Pins Use 5 V?
Do not apply 5 V to an ESP32 GPIO or the 3V3 rail. A development boardâs 5V power input feeds its supply circuitry; it does not change the GPIO logic voltage.
Connect 3.3 V peripherals using compatible signal levels and a common ground.
Use suitable level translation when a peripheral drives 5 V signals toward the ESP32.
Check sensor breakout-board pull-ups: a board powered from 5 V may also pull SDA/SCL up to 5 V.
For DevKitC V4, use only one documented supply method at a time: USB, 5V/GND, or regulated 3V3/GND.
For a custom classic ESP32 design, Espressif recommends a 3.3 V supply capable of at least 500 mA. This is supply capability, not a claim that the device always consumes 500 mA. Include peripheral demand and transient performance when selecting the regulator. A weak supply can appear to be a pinout problem when the board resets during radio activity.
Which Pins Should You Use for I2C, SPI and UART?
GPIO21/22 are the Generic ESP32 Arduino I2C defaults; GPIO18/19/23 with GPIO5 are a common VSPI mapping; GPIO1/3 are UART0 TX/RX. Firmware can route many peripheral signals to other eligible pins.
Interface
Example mapping
Important condition
I2C
SDA 21, SCL 22
Pull-ups to the compatible logic rail; defaults vary by board definition
SPI / VSPI
SCLK 18, MISO 19, MOSI 23, CS 5
GPIO5 is a strap; use another configured CS if the peripheral creates a reset conflict
UART0
TX 1, RX 3
Sharing with the USB bridge can interfere with upload or logs
Additional UART example
TX 17, RX 16
Explicitly configure the mapping; WROOM example, not WROVER
For a compatible 3.3 V sensor, connect VCC to 3V3, GND to GND, SDA to GPIO21 and SCL to GPIO22, then configure the same pins in firmware. The diagram shows signal connections, not physical header positions. SDA/SCL pull-ups must be provided on the sensor board or in your circuit.
Choose I2C pull-up resistance from bus capacitance, speed and device limits rather than treating one resistor value as universal. For UART, connect the ESP32 TX to the peripheral RX and the ESP32 RX to the peripheral TX. RS-232 and RS-485 require the appropriate transceiver; neither connects directly to GPIOs.
Which Pins Support ADC, DAC, PWM and Touch?
Classic ESP32 ADC1 inputs support analog sensing without the ADC2/Wi-Fi conflict; GPIO25 and GPIO26 provide DAC outputs; PWM uses eligible output GPIOs; touch sensing uses a defined subset of pins.
ADC1: GPIO32â39 at chip level, with GPIO32, 33, 34, 35, 36 and 39 accessible on the DevKitC reference.
ADC2: GPIO0, 2, 4, 12â15 and 25â27; analog access conflicts with Wi-Fi on the classic ESP32.
DAC: two 8-bit channels on GPIO25 and GPIO26.
PWM: choose an output-capable, otherwise available GPIO and configure the LEDC peripheral.
Touch: GPIO0, 2, 4, 12â15, 27, 32 and 33 on the classic ESP32.
ADC range depends on attenuation and calibration; a 3.3 V logic supply does not promise accurate 0â3.3 V analog measurement. Check the configured measurement range and the sensorâs maximum output, including transients. The ADC2 restriction concerns analog conversion, not a blanket ban on using every ADC2-capable pin digitally during Wi-Fi operation.
Why Does an ESP32 Stop Booting After Wiring a Peripheral?
First check whether the peripheral changes a strapping level, loads the supply, drives a programming pin or touches the flash bus.
Disconnect the added peripheral and verify the board boots again.
Measure 3V3 and EN during startup. Look for supply dips rather than relying only on a steady-state meter reading.
Check GPIO0 and other straps against the exact moduleâs boot requirements.
Remove external loading from GPIO1/3 while testing firmware upload.
Verify firmware GPIO names against the schematic; do not use header-position numbers as GPIO numbers.
If the board works until Wi-Fi starts, investigate regulator capacity, wiring resistance and decoupling. If only analog readings fail with Wi-Fi enabled, check whether the sensor is on ADC2. These are different failure mechanisms and need different fixes.
What Changes When You Put an ESP32 Module on a Custom PCB?
A custom board must reproduce the moduleâs required power, enable, boot and programming connections while respecting its footprint and antenna placement rules.
Footprint: match the exact module pad numbering, orientation and exposed ground connection.
Antenna: follow the module-specific keepout; do not place copper or components in an area the antenna drawing requires to be clear.
Programming: preserve access to the required UART, EN, boot control and ground signals.
Test access: provide measurable power rails and useful I/O test points before routing becomes congested.
Assembly validation: inspect module joints and verify cold-start, firmware download and the intended peripheral operation.
Our PCB assembly services can support the transition from prototype to assembled hardware. Define the actual test sequence with the build: successful firmware download alone does not prove sensor accuracy, radio performance or behavior with every external load connected.
FAQ About ESP32 Pinout
Is an ESP32 pinout 38 pin diagram valid for every 38-pin board?
No. Matching pin count does not establish matching header order, regulator connections or onboard peripherals. Use the exact board schematic and revision.
Can I use GPIO34 to drive an LED?
No. GPIO34 is input-only on the classic ESP32. Choose an available output-capable GPIO and add suitable current limiting or a driver.
Are VP and VN power connections?
No. On the DevKitC reference, VP maps to GPIO36 and VN to GPIO39. They are input signals, not positive and negative supply terminals.
Does EN mean a normal GPIO?
No. EN controls the chip enable/reset function. Pulling it low resets the chip; it is not a general application output.
Can I reuse a classic ESP32 pin map for ESP32-S3?
No. Use the S3-specific datasheet and development-board schematic. Similar family names do not guarantee compatible GPIO assignments or peripheral features.
Does a USB-C connector mean the ESP32 has native USB?
No. A classic ESP32 development board can use USB-C through a USB-to-UART bridge. The connector shape does not identify how USB communication reaches the chip.
Need Help Moving Your ESP32 Prototype to a Custom PCB?
Bring the exact module part number, schematic and intended pin assignments into the review before PCB layout is finalized. At EBest Circuit, we can discuss fabrication, assembly and the test requirements for your custom board. Contact sales@bestpcbs.com with your design and project requirements.
A wire harness assembly is a set of wires, terminals, connectors, and protective materials arranged to carry power or signals between parts of a product. Building it involves cutting and stripping wire, forming terminations, routing branches, and checking the completed connections. The finished harness must match both the electrical pinout and the physical installation.
At EBest Circuit, we provide custom harnesses alongside PCB fabrication, component sourcing, and PCB assembly. This lets us address the connection between a board, its wiring, and the enclosure as part of the same project.
Key Takeaways
Wire harness assembly turns individual conductors and connectors into a repeatable electrical interconnection with defined branch lengths and pin assignments.
An assembler prepares wires, forms terminations, inserts contacts, routes the bundle, and checks it against the drawing and test requirements.
The assembly sequence runs from material verification and wire preparation through termination, routing, protection, and final testing.
Wire gauge alone does not establish terminal compatibility. Insulation diameter, conductor construction, contact part number, and tooling also matter.
A form board controls physical routing; it does not prove that connector cavities are wired correctly.
Continuity testing does not replace crimp inspection or pull testing. Electrical and mechanical checks reveal different defects.
PCB integration needs matching connector orientation, accessible latches, and strain relief that keeps cable loads off solder joints.
What Is Inside a Wire Harness Assembly?
A harness contains insulated wires, electrical terminations, and the hardware needed to hold and protect their route. Some are simple two-ended leads; others divide into several branches connecting sensors, controls, and power inputs.
Part
Function
Insulated conductors
Carry current or signals between connection points
Terminals and contacts
Join conductors to mating contacts or fastening points
Connector housings
Position contacts, provide keying, and retain the connection
Sleeves, tape, or tubing
Bundle wires and provide specified mechanical protection
Clamps and strain relief
Support the route and reduce loads at terminations
Identification labels
Identify circuits, branches, or assembly revisions
A wiring diagram defines which points connect. A harness drawing adds physical details such as branch locations, finished lengths, connector views, and label positions. Production needs both kinds of information.
How Does a Wire Harness Differ from a Cable Assembly?
A wire harness typically organizes multiple conductors into a routed bundle, while a cable assembly often uses a common jacket around its conductors. The terms overlap, so the actual construction matters more than the name.
A branching harness may connect several points inside an enclosure. A jacketed USB or coaxial cable more often provides a defined connection between two interfaces. Neither name alone guarantees shielding, water resistance, or suitability for repeated flexing; those properties come from the materials and construction.
Which Custom Harness Types Can We Supply?
Our custom wire harness range includes connector harnesses, terminal harnesses, IDC cables, USB/DC cables, and coaxial cables. We also support temperature-sensor wires and harness fuse-holder configurations.
Connector and terminal harnesses: connections between boards, switches, power inputs, and other assemblies.
Flat and IDC cables: organized multi-conductor connections using the specified connector and cable combination.
USB/DC and coaxial cables: interface-specific assemblies with defined connector and cable requirements.
Hook-up wire options: PVC, PE, TPU, and LSZH materials within the agreed wire specification.
For a custom wire harness assembly, we review the actual connector and wire combination rather than treating every cable in one category as interchangeable. A sensor lead, a DC power lead, and a data cable need different selection and verification criteria.
How Should Wires and Terminals Be Selected?
Select the wire and terminal as a matched combination, using the terminal manufacturer’s conductor-size and insulation-diameter limits. Then check that the combination meets the circuit’s electrical and environmental requirements.
At EBest Circuit, our wire harness assembly capabilities include the following wire and insulation ranges. We match each wire to the specified terminal and tooling before production.
Parameter
Our Supported Range
Copper wire size
20â17 AWG
Conductor cross-sectional area
0.5â1.0 mmÂČ
Wire insulation outside diameter
1.2â2.1 mm
For assemblies using TE Connectivity contact 1-929989-0, these ranges must be checked against the selected wire and contact specification. AWG and metric wire sizes are separate selection designations, not exact one-to-one conversions. A wire with the correct conductor size can still have insulation that is too large for the contact or seal.
Electrical load: account for current, conductor resistance, voltage drop, and temperature rise in the installed bundle.
Environment: specify temperature exposure, abrasion, chemicals, moisture, and any flame or smoke requirements.
Termination: match conductor size and construction, insulation diameter, contact plating, and approved tooling.
Motion: distinguish fixed wiring from cables designed for repeated bending.
Connector pitch is only one dimension. Mating family, keying, contact gender, cavity numbering, and latch geometry also determine whether two connectors work together.
Wire Harness Assembly Process
The wire harness assembly process converts an approved drawing and bill of materials into a terminated, routed, protected, and tested assembly.
Verify materials: check wire markings, connector and terminal part numbers, seals, sleeves, and drawing revision.
Cut and identify: prepare wires to the specified cut lengths and apply identification where required.
Strip insulation: expose the conductor to the termination specification without damaging strands.
Form terminations: crimp, use IDC, or solder according to the selected connection method. Install seals or sleeves first when they cannot pass over the finished terminal.
Populate housings: insert each contact into its assigned cavity and verify retention and any secondary lock.
Route the bundle: position branches, apply protection, and secure the harness without crushing insulation.
Inspect and test: check dimensions, workmanship, pin mapping, and the agreed electrical requirements.
Cut length and finished assembly length are not always identical. The drawing needs a clear measurement datum, such as a connector mating face or a defined termination point.
What Does a Wire Harness Assembly Board Do?
A wire harness assembly board holds the bundle in its intended shape while operators route wires and position branches. Pegs and connector holders make the physical arrangement repeatable.
The board represents the harness layout; it is not a printed circuit board. Its controlled drawing should identify connector orientation, branch points, and dimensional references. A flat fixture also cannot fully reproduce a three-dimensional enclosure, so a first assembly should be checked in its intended installation.
Electrical testing remains separate. A harness can fit the fixture perfectly and still have two contacts inserted into the wrong cavities.
Which Wire Harness Assembly Tools Are Needed?
Wire harness assembly tools include wire cutters, stripping tools, termination tools, insertion or extraction tools, and inspection equipment. The terminal system determines the crimper and die, not just the wire gauge.
Operation
Typical tooling
Wire preparation
Length-controlled cutter and suitable insulation stripper
Crimp termination
Specified hand tool, applicator, or crimp press tooling
IDC termination
Connector-specific press tooling and support fixture
Contact placement or removal
Compatible insertion and extraction tools
Crimp verification
Magnification, appropriate crimp micrometer, and pull-test equipment
Electrical verification
Harness tester with mating adapters and a validated test program
Molex identifies strip length, crimp height, and pull-force requirements in its Application Tooling Specifications. These documents are tied to particular tools and terminals. A similar-looking die is not evidence that a substitute tool produces an acceptable termination.
How Is Crimp Quality Checked?
Crimp quality is checked through workmanship inspection, specified dimensions, and mechanical testingânot appearance alone.
Inspect conductor placement, strand damage, insulation position, and terminal deformation. The conductor crimp and insulation support perform different jobs. Insulation trapped inside the conductor crimp can prevent the intended metal-to-metal connection.
Our crimping capabilities include the following 18 AWG configuration with Molex terminal series 84590. We can meet these dimensional and pull-force requirements for this specified combination.
Parameter
Our Supported Configuration
Wire size
18 AWG
Terminal series
Molex 84590
Reference conductor crimp height
1.46â1.54 mm
Minimum pull force
111.2 N
Application tooling specification
ATS-6381157HM
For this configuration, pull testing excludes the influence of the insulation crimp. Other terminal and wire combinations use their own approved crimp-height and pull-force limits.
A destructive pull test evaluates a sample termination; it is not a test to perform on every finished connection that will be shipped. Define sampling, measurement methods, and acceptance criteria in the production plan.
Which Tests Verify a Finished Harness?
Pin-to-pin testing checks the wiring pattern and detects opens, shorts, and miswires. Additional tests address resistance or insulation performance when the product specification requires them.
Test
What it checks
Continuity and pin mapping
Required connections exist at the correct connector cavities
Short-circuit check
Unintended connections between circuits
Connection resistance
The measured path remains below the specified limit
Insulation resistance
Isolation between designated circuits under specified DC conditions
Dielectric withstand
Insulation withstands the specified test voltage without breakdown
A continuity pass does not prove adequate mechanical retention or insulation performance. Validate test fixtures and the pin map against the approved drawing; otherwise, an incorrect test program can repeatedly accept an incorrect harness.
High-voltage tests require a qualified setup and product-specific limits. Do not apply a generic hipot voltage to a harness connected to a PCB, sensor, or embedded electronic component. Such components may need isolation or a specifically designed test sequence.
What Causes Wire Harness Assembly Failures?
Common causes include damaged strands, incorrect cavity assignments, poorly retained contacts, and mechanical stress at the cable exit. Inspection is most effective before sleeving or bundling hides the termination.
Intermittent open circuit: inspect contact seating, damaged conductors, and a loose or unsuitable crimp.
Incorrect function: compare connector cavity numbers and drawing view orientation before assuming a PCB fault.
Localized heating: investigate connection resistance, current loading, and the terminal-wire combination.
Insulation wear: look for sharp enclosure edges, over-tight ties, or movement against nearby hardware.
Terminal push-back: check contact retention and housing locks rather than pushing the connector together harder.
IPC/WHMA-A-620 provides requirements and acceptance criteria for cable and harness assemblies, including crimped, soldered, and mechanically secured interconnections. Specify the applicable revision and acceptance class for the project. Referencing the standard does not establish a manufacturer’s certification.
How Should a Harness Connect to a PCB Assembly?
The harness must match the board connector’s pinout and mating orientation, with mechanical support that prevents cable loads from reaching solder joints.
Review the connector from the specified viewing direction. A mating-face view and a wire-entry view can reverse the apparent cavity order. During PCB assembly planning, check access to the latch and confirm that the connector can be inserted without excessive force on the board.
Keep routing clear of sharp edges, moving parts, and hot components.
Provide the specified bend radius and enough service slack for assembly and maintenance.
Use clamps or strain relief where cable loads could reach contacts or soldered joints.
Verify installed fit before freezing the branch lengths for production.
Our box build assembly service connects PCB assembly with wiring and enclosure integration. For these projects, reviewing the board, harness, and mechanical layout together helps identify mismatched interfaces before final assembly.
How Should You Compare Wire Harness Assembly Companies?
Compare wire harness assembly companies by their ability to control the exact termination, pinout, and installed fitânot simply their list of cable types.
Ask how the proposed build will be verified. Useful evidence includes the approved terminal/tool combination, a first-article dimensional check, and a test program tied to the released wiring diagram. For repeated orders, confirm how drawing revisions and material substitutions are controlled.
Price comparisons should use the same scope. Connector choice, branch count, manual routing, protective materials, tooling, and testing can change the work involved. A quote for loose harnesses is not directly comparable with one that includes installation and system testing.
FAQ About Wire Harness Assembly
Can wire colors replace circuit labels?
No. Colors help identification, but the pin map and circuit identifiers remain the production reference. Repeated colors or approved material substitutions can otherwise make two circuits easy to confuse.
Does a sealed connector make the entire harness waterproof?
No. Sealing depends on the complete construction, including the correct wire seals, cavity plugs, mating interface, and installation. A connector’s rating cannot automatically be assigned to the whole harness.
Can two wires be crimped into one terminal?
Only when that terminal and tooling are specified for the particular double-wire combination. Two wires that physically fit in a barrel do not establish an approved electrical or mechanical connection.
Is an IDC termination the same as a crimp?
No. An insulation-displacement contact reaches the conductor through its insulation using a contact slot. A conventional conductor crimp compresses the terminal around a prepared conductor. Each method requires its own compatible wire and tooling.
Can a sample harness replace a controlled drawing?
A sample can help establish routing and fit, but it does not reliably communicate hidden connections, material specifications, or acceptance limits. Document those details before using the sample as a production reference.
Need a Harness That Fits Your PCB and Enclosure?
At EBest Circuit, we support custom wire harnesses, PCB fabrication, PCB assembly, and box build integration. Send your harness drawing or pin map, connector part numbers, quantities, and installation requirements to sales@bestpcbs.com. We can review the connection requirements alongside your PCBA project and clarify the assembly and testing scope before quotation.
Printed circuit board dicing is a precision cutting process that separates individual PCBs or circuit substrates from a larger panel using an abrasive blade or a laser. It is commonly considered for ceramic substrates, miniature circuits, and applications requiring narrow cutting streets or tightly controlled edges.
The challenge is not simply separating the boards. An unsuitable cutting method can cause chipped edges, microcracks, burrs, or damaged conductors, even when the finished dimensions appear correct. This article explains how PCB dicing works, which materials and applications benefit from it, and how to control cutting quality.
What Is Printed Circuit Board Dicing?
Printed circuit board dicing is a precision singulation process that removes material along defined cutting paths to separate individual circuits. It is particularly useful when brittle substrates, narrow cutting streets, or strict edge requirements make conventional breakaway separation unsuitable.
PCB dicing is related to two other manufacturing terms, but they are not identical:
PCB dicing: Precision cutting, traditionally using a thin abrasive blade, although laser-based precision separation is also described as laser dicing.
PCB singulation: The general separation of individual circuit units from a larger panel or substrate.
PCB depaneling: Removing PCBs from a production panel using methods such as routing, V-scoring, or laser cutting.
For example, a standard FR-4 PCB may be separated using routed tabs or V-scoring. A brittle ceramic substrate containing closely spaced circuits may instead require precision blade dicing or a qualified laser process.
How Does the Printed Circuit Board Dicing Process Work?
The PCB dicing process involves six stages: reviewing the cutting requirements, securing the substrate, setting the cutting parameters, aligning the equipment, performing the cut, and inspecting the separated boards.
Step 1: Review the PCB Layout and Cutting Requirements
Confirm the finished dimensions, material, thickness, cutting street width, and copper clearance. Identify components or other protected features near the proposed cutting path.
Step 2: Secure the PCB or Substrate
Position the workpiece using a suitable fixture, carrier, or adhesive support tape. Proper support prevents movement and helps protect thin or brittle substrates during separation.
Step 3: Set the Cutting Parameters
For blade dicing, select the blade specification, spindle conditions, feed rate, and cutting depth. For laser dicing, establish the laser settings, focus position, scanning speed, and number of passes.
Step 4: Align the Cutting Tool
Align the blade or laser with the defined cutting streets using suitable reference features. Verify the position before cutting, particularly when conductive features are close to the finished edge.
Step 5: Perform the Dicing Operation
Follow the approved cutting path and sequence while maintaining workpiece stability. The cutting sequence should prevent separated units from shifting or contacting the tool.
Step 6: Clean and Inspect the Separated Boards
Remove cutting debris or process residues as required. Check finished dimensions, edge condition, and cleanliness against the agreed specifications.
The result should be more than a fully separated board. Each unit must retain its required dimensions, structural integrity, and electrical condition after cutting.
What Are the Main Methods of PCB Dicing?
Blade dicing and laser dicing are two main precision cutting methods used for PCB and circuit substrate separation. They differ in how material is removed, the cutting geometry they support, and the defects that must be controlled.
Factor
Blade Dicing
Laser Dicing
Cutting Principle
Mechanical abrasion
Laser material removal
Cutting Tool
Thin rotating abrasive blade
Focused laser beam
Cutting Geometry
Primarily straight cuts
Straight and complex contours
Mechanical Stress
Requires control of cutting forces
Minimal direct mechanical cutting force
Suitable Materials
Commonly rigid, brittle substrates
Depends on laser type and material stack
Main Edge Risks
Chipping, cracks, burrs
Thermal damage, residue, taper
Main Process Controls
Blade condition, feed, depth, coolant
Pulse settings, focus, scanning, passes
Which PCB Materials Are Suitable for Dicing?
Ceramic circuit substrates, thin rigid PCBs, and certain electronic package substrates are common candidates for precision dicing. Flexible and mixed-material circuits may also require precision cutting, although a laser process is often more appropriate for these constructions.
The main material considerations are:
Ceramic PCBs: Alumina (AlâOâ) and aluminum nitride (AlN) are hard, brittle materials. Blade dicing and suitable laser processes may be used, with particular attention to chipping, microcracks, and dimensional accuracy.
Thin Rigid PCBs: Thin FR-4 and similar laminates may require stable support during cutting. Their glass fibers, resin, and copper layers respond differently to mechanical cutting and laser energy.
Flexible and Rigid-Flex PCBs: Polyimide-based circuits can deform under mechanical loading. Laser cutting can produce fine contours without direct cutting force, but adhesive layers, copper, and local heat effects still require evaluation.
Metal-Backed PCBs: Aluminum-backed and copper-backed boards are more challenging because the conductive backing and dielectric layers have different cutting characteristics. Metal burrs, tool wear, and heat input require additional attention.
Material thickness, copper distribution, surface films, and layer construction also affect cutting performance. A process qualified for one substrate should not be reused on another material without review.
Where Is Printed Circuit Board Dicing Used?
Printed circuit board dicing is used where circuit dimensions, material properties, or edge requirements call for precision separation. Typical applications involve brittle substrates, miniature circuits, specialized electronic modules, and delicate circuit constructions.
1. Ceramic Circuit Substrates
Ceramic substrates are used in power electronics, high-temperature circuits, and applications requiring electrical insulation and thermal performance.
Multiple circuits may be produced on a larger ceramic sheet. Precision dicing separates them while controlling edge chipping, cracking, and dimensional variation.
2. RF and Microwave Circuits
Some RF and microwave circuits use specialized high-frequency laminates or ceramic substrates. The finished outline may need to meet tight mechanical requirements, especially near board-edge interfaces.
Precision cutting can be considered when conventional separation cannot meet the specified dimensions or edge condition. Copper clearance and material compatibility must be evaluated before processing.
3. Miniature Electronic Modules
Miniature electronic modules may contain many small circuit units arranged closely together. Limited separation space can make conventional breakaway tabs or mechanical routing impractical.
A suitable precision dicing process can control cutting location while reducing the risk of damaging adjacent circuit features.
4. Electronic Package Substrates
Certain electronic package substrates and substrate-like circuit assemblies require accurately positioned separation cuts.
Narrow cutting streets and nearby conductors can make kerf control and edge integrity particularly significant. These substrates must be evaluated according to their actual construction rather than treated as conventional FR-4 panels.
5. Thin and Delicate Circuit Panels
Thin rigid PCBs, flexible circuits, and rigid-flex constructions may be sensitive to mechanical separation forces.
A qualified laser cutting process can reduce direct mechanical loading and accommodate complex contours, although thermal response and cleanliness requirements still need review.
Not every board used in these applications requires dicing. The method is selected when its cutting characteristics provide a practical advantage over conventional separation.
When Should You Use PCB Dicing Instead of Conventional Depaneling?
PCB dicing is worth considering when conventional V-scoring or routing cannot meet the material, cutting-clearance, or edge-quality requirements.
Typical situations include:
Brittle Materials: Ceramic substrates may crack when subjected to uncontrolled breakaway forces.
Narrow Cutting Streets: Closely spaced circuits may require a smaller, more accurately controlled cutting path.
Miniature Board Dimensions: Small circuit units may require precise positioning and continuous support during separation.
Strict Edge Requirements: Limits on chipping, burrs, cracks, or contamination may justify a specialized cutting process.
Delicate Structures: Thin boards and circuits with sensitive nearby features may benefit from reduced separation forces.
However, conventional depaneling remains suitable for many standard PCB panels. If routing or V-scoring meets the outline, edge-quality, and mechanical-stress requirements, specialized dicing may add unnecessary processing cost.
The choice should be based on the finished-board requirements and an acceptable production yield, not on the assumption that a more specialized cutting process is always better.
What PCB Design Details Matter Before Dicing?
Before PCB dicing, the manufacturing data must define the cutting path, permitted material removal, protected circuit features, and finished-board tolerances.
The following details require review:
Cutting Street Width: Specify the available corridor between adjacent circuits. It must accommodate the intended cut and positioning variation.
Kerf Allowance: Define the permitted width and location of material removal.
Copper Clearance: Identify conductors, plated features, and exposed copper near the cutting path.
Board Thickness and Stackup: Provide the substrate material, dielectric construction, copper thickness, and backing layers.
Component Clearance: For populated boards, confirm that components, solder joints, and connectors do not interfere with cutting or handling.
Edge Tolerance: Specify allowable dimensional variation, chipping, cracks, burrs, and other relevant defects.
Cutting street and kerf are not interchangeable. The cutting street is the designated separation corridor, while the kerf is the actual width of material removed.
The expected kerf, including cutting and alignment variation, must remain within the permitted area. Neither the nominal blade thickness nor the laser spot diameter alone determines the final cut width.
Clearly defined requirements reduce the risk of cutting into functional features and make manufacturing feasibility easier to evaluate.
Which Parameters Affect PCB Dicing Accuracy and Edge Quality?
PCB dicing accuracy depends on tool condition, cutting parameters, material response, and workpiece stability. Incorrect settings can produce chipped edges, dimensional errors, excessive burrs, or incomplete separation.
For blade dicing, the main parameters include:
Blade Specification: Abrasive grain size, concentration, bond type, and blade thickness influence material removal and edge quality.
Spindle Speed: Must remain compatible with the blade specification and cutting conditions.
Feed Rate: Excessive feed can increase cutting load and contribute to chipping or tool deflection.
Cutting Depth: Must achieve the required separation without damaging the supporting carrier.
Coolant Delivery: Where applicable, suitable coolant flow helps manage cutting heat, remove debris, and protect the blade.
For laser dicing, the main parameters include:
Laser Wavelength: Determines how effectively different materials absorb laser energy.
Pulse Duration: Influences energy deposition and the potential for thermal effects.
Pulse Energy and Scanning Speed: Affect material removal, cutting efficiency, and heat accumulation.
Focus Position: Influences kerf geometry, cutting depth, and sidewall condition.
Number of Passes: Must provide complete separation without unacceptable damage to surrounding material.
In both methods, alignment accuracy, substrate flatness, and fixture stability affect the final cut.
Process parameters should be verified through representative cutting trials, especially when the material, thickness, or layer structure changes.
What Defects Can PCB Dicing Cause?
Common PCB dicing defects include edge chipping, microcracks, burrs, delamination, thermal damage, dimensional errors, and contamination. Their causes often involve a mismatch between the material, cutting method, support, and process settings.
Edge Chipping: Small fragments break away from the cut edge, particularly on brittle substrates. Review the blade specification, cutting load, entry and exit conditions, and substrate support.
Microcracks: Fine cracks may form during ceramic or brittle-material cutting. These can extend beyond visible chips and may require additional inspection.
Burrs: Raised or smeared material can develop where the cutting path intersects copper or metal backing. Check tool condition and material removal settings.
Delamination: Separation between layers can result from excessive mechanical loading or localized heating. The affected material interface should be examined.
Thermal Damage: Unsuitable laser conditions may produce discoloration, carbonization, or other heat-affected material.
Dimensional Errors: Tool misalignment, substrate movement, blade wear, or focus variation can shift the finished edge beyond tolerance.
Contamination: Abrasive particles, cutting fluids, or laser-generated residues may remain on the PCB after separation.
Visible edge appearance alone does not establish structural quality. A board can meet its outline dimensions while containing hidden cracks or contamination near functional features.
Corrective action should be followed by repeat cutting and inspection to confirm that the defect has been reduced to an acceptable level.
How Can You Inspect the Quality of Diced PCBs?
Diced PCB inspection should verify the finished dimensions, edge integrity, cleanliness, and relevant electrical performance. The inspection plan must match the risks identified for the material and cutting method.
The main inspection methods include:
Visual Inspection: Examine the cut perimeter for visible chips, cracks, burrs, exposed fibers, discoloration, and cutting residues.
Dimensional Measurement: Verify the finished outline, critical edge locations, and specified tolerances using suitable measurement equipment.
Magnified Inspection: Use optical magnification to assess small chips, cracks, and other defects that are difficult to evaluate visually.
Structural Inspection: Where required, examine qualification samples using cross-sectioning or another agreed method to assess hidden cracking or delamination.
Electrical and Functional Testing: For applicable boards, verify continuity, insulation, or relevant circuit functions after separation.
Inspection results should be compared against predefined acceptance criteria. For example, a ceramic substrate may have a specified maximum chipping allowance, while a metal-backed board may require additional inspection for conductive burrs.
Approved samples, process settings, and inspection records should be retained where required to maintain consistent acceptance decisions across production batches.
FAQs About Printed Circuit Board Dicing
Q1: Can a dicing blade cut through copper layers?
A1: Yes, with a suitable blade and qualified process. Copper may affect blade wear and produce burrs or smeared material, so clearance and edge quality must be checked.
Q2: Does a narrower kerf always improve cutting quality?
A2: No. A narrower kerf does not guarantee a better cut. Material behavior, cutting stability, and positioning accuracy also affect edge quality.
Q3: Can PCB dicing be performed after SMT assembly?
A3: Yes, in some applications. Component clearance, cutting forces, contamination, cleaning restrictions, and handling must be reviewed before processing populated boards.
Q4: Is laser scribing the same as full-cut laser dicing?
A4: No. Laser scribing creates a groove or weakened separation line, while full-cut laser dicing removes material through the required thickness to separate the units directly.
Q5: Can blade dicing produce curved PCB outlines?
A5: Conventional blade dicing is mainly suited to straight cuts. Laser cutting or routing is generally more practical for curved or complex PCB outlines.
Q6: Why is coolant used during blade dicing?
A6: Coolant helps control cutting heat and remove debris. It also helps protect the blade during operation. The coolant type and delivery must follow the equipment and blade manufacturer's requirements.
Q7: Can PCB dicing affect electrical insulation?
A7: Yes. Cracks, conductive burrs, or contamination can affect insulation. Copper clearance and appropriate post-cut inspection help reduce these risks.
Q8: Can one cutting recipe be used for different ceramic substrates?
A8: Not without evaluation. Alumina, AlN, and other ceramics differ in mechanical and thermal behavior, so their cutting conditions may need to be adjusted.
Q9: Is PCB dicing practical for low-volume prototypes?
A9: Yes, if a suitable cutting process is available. However, setup, fixtures, and qualification cuts may represent a significant portion of the total cost.
Q10: Does laser dicing always eliminate post-cut cleaning?
A10: No. Cleaning requirements depend on the laser process and material. Some processes produce very clean edges, while others may leave residues that require removal.
Conclusion
Printed circuit board dicing provides a controlled way to separate circuits when material properties, cutting dimensions, or edge-quality requirements make conventional PCB depaneling unsuitable. Blade dicing is commonly used for compatible rigid substrates and straight cuts, while laser cutting offers greater flexibility for delicate materials and complex contours. Reliable results depend on the material stack, cutting parameters, workpiece support, and inspection requirements.
For PCB projects involving ceramic substrates, thin rigid boards, or demanding cutting requirements, EBest Circuit provides PCB manufacturing, DFM review, and PCBA support. Send your Gerber files, material specifications, board thickness, quantity, and cutting requirements to sales@bestpcbs.com. Our technical team can review manufacturing feasibility and confirm the applicable production scope before quotation.
The PCB material price increase in October 2026 is adding new cost pressure to circuit board purchasing. On October 13, Kingboard Laminates announced a 15% price increase for copper-clad laminates (CCL) and prepreg (PP) manufactured using 2116 or thinner fiberglass fabrics. The adjustment took effect immediately, reflecting continued supply pressure on electronic glass fabric and other upstream materials.
For PCB buyers, the concern goes beyond higher material prices. Will your next PCB quotation change? Could material shortages extend production lead times? And how can you keep manufacturing costs under control without compromising board reliability?
At EBest Circuit, we provide PCB fabrication, component sourcing, and PCB assembly services. Our engineering team helps customers review material requirements, PCB stackups, manufacturing specifications, and production quantities to identify practical cost-saving opportunities before ordering.
Key Takeaways
The October 2026 Kingboard laminates price increase affects CCL and prepreg using 2116 or thinner glass fabrics, with a 15% adjustment.
A copper clad laminate price increase does not translate directly into the same increase in finished PCB prices.
The copper clad laminate price trend reflects different material grades, glass fabric supplies, copper foil costs, and order conditions.
Compare copper clad laminate price changes against the approved stackup, panel utilization, copper weight, and production quantity.
Material alternatives require technical review and customer approval; forecasts and stable specifications can improve purchasing planning.
At EBest Circuit, we support material selection, DFM, PCB fabrication, and assembly to help customers manage production costs.
What Is the Latest Kingboard PCB Material Price Increase in October 2026?
On October 13, 2026, Guangdong Kingboard Laminates Trading Co., Ltd. issued price adjustment notice No. 20261013, announcing an immediate 15% increase for selected PCB materials.
The adjustment covers copper-clad laminates and prepreg manufactured with 2116 or thinner electronic fiberglass fabrics. Kingboard attributed the increase to strong market demand, tight upstream supplies of electronic glass fabric and fiberglass yarn, and significant increases in associated material costs.
Item
October 2026 adjustment
Manufacturer
Kingboard Laminates
Announcement date
October 13, 2026
Effective date
Immediately
Affected materials
Copper-clad laminates and prepreg
Fiberglass fabric specification
2116 and thinner styles
Announced price increase
15%
Stated reasons
Strong demand, tight glass fabric and fiberglass yarn supply, rising material costs
The latest adjustment follows a series of price increases across Kingboardâs laminate and prepreg product lines during 2025 and 2026. However, the 15% increase applies to the specified material categories, rather than every type of FR-4 laminate or finished PCB.
For companies purchasing multilayer PCBs, this distinction matters. A boardâs cost exposure depends on its material construction, approved laminate specifications, and quantity of affected materials consumed during manufacturing.
Why Are PCB Raw Material Prices Rising in 2026?
PCB raw material prices are rising because demand for certain electronic materials is placing pressure on upstream manufacturing capacity and supply availability. Electronic glass fabric, copper foil, and resin systems are essential inputs for copper-clad laminates, and cost changes in these materials can affect PCB fabrication prices.
Electronic fiberglass fabric supply
Fiberglass fabric provides reinforcement and dimensional stability within laminate and prepreg materials. Different glass cloth styles are selected according to thickness, resin content, electrical properties, and stackup requirements. Thin fiberglass fabrics, including 2116, 1080, and other fine styles, are commonly used in multilayer constructions that require controlled dielectric thickness. When these materials become more expensive or difficult to source, laminate manufacturers face higher production costs.
Copper foil cost pressure
Copper foil forms the conductive layers of a PCB. Its cost is affected by copper prices, foil processing requirements, thickness, and product specifications. Boards requiring heavier copper, additional copper layers, or larger panel areas can have greater exposure to copper-related material expenses.
Growing demand for advanced electronics
AI infrastructure, data centers, automotive electronics, communication equipment, and other electronic applications require substantial PCB manufacturing capacity. Some applications also depend on specialized laminate materials, high-layer-count stackups, and controlled electrical performance. These demand patterns can tighten supplies of particular material grades. The degree of impact varies by product category rather than affecting every PCB material equally.
For PCB buyers, the immediate concern is whether the materials specified in their current designs remain available at acceptable prices and lead times.
How Many Times Has Kingboard Raised Prices in 2026?
Kingboard Laminates has announced eight rounds of PCB material price increases in 2026 through October 13, bringing the reported total to 12 rounds since February 2025. These adjustments have affected FR-4 copper-clad laminates, CEM materials, prepreg, and certain copper foil processing charges, with different increases applied according to product type and specification.
The frequency of these increases illustrates the sustained pricing pressure facing PCB material buyers. The latest adjustment is particularly relevant to multilayer PCBs that use thin fiberglass fabrics in their laminate and prepreg constructions.
Kingboard PCB Material Price Increase History (2025â2026)
Date
Affected PCB materials
Announced price increase
Feb 15, 2025
FR-4 and CEM laminates
RMB 5 per sheet
Aug 15, 2025
Copper-clad laminates
RMB 10 per sheet
Dec 1, 2025
FR-4, CEM, prepreg
FR-4 and PP +10%; CEM +5%
Dec 26, 2025
Laminate products
+10%
Mar 10, 2026
Laminates, PP, copper foil processing
+10% for affected products
Apr 3, 2026
Laminates and prepreg
+10%
Apr 28, 2026
FR-4 laminates and prepreg
+10%
May 27, 2026
Laminates and prepreg
Laminates +10%; PP +20%
Jun 16, 2026
FR-4 laminates and prepreg
+15%
Jul 6, 2026
FR-4, CEM-1/22F, prepreg
+10%â15%, depending on product
Aug 25, 2026
FR-4 laminates and prepreg
FR-4 +10%; PP +10%â20%
Oct 13, 2026
Laminates and PP using 2116 or thinner fiberglass fabrics
+15%
According to industry reporting, prices for some conventional copper-clad laminates rose from approximately RMB 100 per sheet two years earlier to around RMB 400 per sheet. These figures describe particular market observations and should not be generalized to every material grade, thickness, or supplier.
Because the announcements involve different materials and specifications, their percentages cannot simply be added together to calculate one cumulative increase for all PCB raw materials.
For PCB buyers, the repeated adjustments introduce challenges in material budgeting, quotation validity, production planning, and long-term purchasing costs. Even when a PCB design remains unchanged, the material cost behind a repeat order may differ from that of a previous production batch.
How Does the 15% Laminate Price Increase Affect PCB Manufacturing Costs?
A 15% increase in selected laminate prices does not automatically translate into a 15% increase in finished PCB prices.
A PCB quotation includes raw materials, drilling, copper plating, imaging, etching, solder mask, surface finishing, inspection, electrical testing, and other manufacturing operations. The material portion varies depending on board construction and production quantity.
PCB cost factor
Potential effect of rising material prices
Laminate and prepreg
Higher purchasing costs for affected grades
PCB layer count
More dielectric and copper layers increase material consumption
PCB dimensions
Larger boards generally consume more panel material
Copper thickness
Higher copper requirements can increase material and processing expenses
Stackup construction
Specific prepreg and core requirements may limit available alternatives
Production quantity
Purchasing quantities, panel utilization, and setup costs influence unit pricing
Material availability
Limited supply can affect procurement and manufacturing schedules
Example: How a 15% material increase can affect a PCB quotation
Assume laminate and prepreg represent 30% of a finished PCBâs original manufacturing cost. If all of that material portion rises by 15%, while every other cost remains unchanged, the resulting cost increase would be 30% Ă 15% = 4.5% of the original PCB manufacturing cost.
This is an illustrative calculation, not an industry-wide PCB price forecast. Actual cost changes depend on material specifications, existing inventory, purchasing arrangements, and manufacturing efficiency. For buyers sourcing multilayer FR-4 PCBs, reviewing the material composition and stackup is often more useful than applying a uniform percentage increase to the entire PCB budget.
Which PCB Types Are More Sensitive to Rising CCL and Prepreg Prices?
Not every PCB design has the same exposure to changing laminate prices. Sensitivity depends on the amount and type of material used, construction complexity, and available approved alternatives.
Multilayer FR-4 PCBs deserve particular attention. These boards typically use multiple core and prepreg layers to achieve their required thickness and electrical characteristics. When a design requires a specific glass fabric style or dielectric construction, a manufacturer must consider both material cost and technical compatibility.
HDI and high-speed boards may also have more restrictive material requirements, although their exposure to this particular announcement depends on the exact materials specified. For procurement teams, the best approach is to identify which current PCB part numbers use the affected material specifications before revising purchasing budgets.
How Can You Reduce PCB Manufacturing Costs During Material Price Increases?
The most effective way to control PCB costs is to review the design and manufacturing specifications before committing to production. Changes to panel utilization, material selection, stackup construction, and order planning may produce savings without changing the intended function of the board.
1. Review your PCB stackup and laminate requirements
Ask your PCB manufacturer to check whether the proposed stackup uses material grades that are necessary for the design. For standard FR-4 applications, there may be more than one suitable core and prepreg construction. However, any proposed substitution must preserve the required overall thickness, dielectric properties, electrical performance, thermal characteristics, and reliability. For impedance-controlled boards, a change in dielectric thickness or material properties may require trace geometry adjustments and renewed impedance verification.
2. Improve PCB panel utilization
Manufacturers process PCBs using production panels. The arrangement of individual boards on a panel directly affects material utilization. Optimizing board orientation, spacing, and manufacturing panel design can help reduce material waste. For projects with relatively large production quantities, even modest improvements in panel utilization can influence the total manufacturing cost.
3. Evaluate unnecessary design complexity
Additional layers, excessive copper thickness, specialized materials, and demanding manufacturing tolerances can increase fabrication costs. A design review should distinguish between requirements that are electrically or mechanically necessary and specifications that may be more restrictive than the application requires. For example, an unnecessarily tight dimensional tolerance can introduce manufacturing difficulty without improving product performance.
4. Plan production quantities more carefully
Small prototype batches and volume production have different cost structures. Combining planned demand into an appropriate production schedule may improve purchasing efficiency and reduce repeated setup expenses. The right order quantity should reflect actual demand, inventory carrying costs, approved design revisions, and production forecasts.
5. Request a DFM review before placing an order
A design for manufacturability (DFM) review can identify material constraints, fabrication risks, and cost-saving opportunities early. It is particularly useful when moving from prototype production to higher-volume manufacturing. An effective DFM review should cover material selection, stackup construction, drilling specifications, trace and spacing requirements, copper distribution, panel utilization, and test requirements.
6. Compare total manufacturing cost, not only board price
The lowest unit quotation does not always provide the lowest overall project cost. Rework, rejected boards, production delays, transportation expenses, and inconsistent quality can reduce apparent savings. Evaluate suppliers according to manufacturing capability, material compliance, quality control, lead-time commitments, and overall project cost.
Can You Use Alternative PCB Materials to Control Costs?
Alternative PCB materials may reduce manufacturing costs when they satisfy the original designâs electrical, mechanical, thermal, and regulatory requirements. For example, a standard industrial control board may have more material flexibility than a high-speed communication PCB requiring a specific dielectric constant and loss tangent. Material substitutions should therefore be evaluated against the application rather than price alone.
Material property
Why it matters before substitution
Glass transition temperature (Tg)
Affects thermal performance and processing suitability
Decomposition temperature (Td)
Relevant to thermal exposure and material reliability
Dielectric constant (Dk)
Influences impedance and signal propagation
Dissipation factor (Df)
Contributes to dielectric signal loss
Coefficient of thermal expansion (CTE)
Affects dimensional stability and plated-hole reliability
Material thickness
Determines stackup geometry and mechanical dimensions
Flammability classification
Must satisfy applicable product safety requirements
Approved material specification
May restrict substitution in qualified products
For medical, automotive, industrial, and other reliability-sensitive applications, material changes may require customer approval and additional qualification testing. A lower-cost material is useful only when the finished PCB continues to meet its required performance and reliability criteria. Buyers should request written confirmation of proposed substitutions and their technical implications before releasing a revised production order.
Will PCB Material Shortages Affect Manufacturing Lead Times?
PCB material shortages can extend production lead times when a manufacturer cannot obtain the approved core, prepreg, copper foil, or specialized laminate within the planned purchasing schedule. The impact depends on material availability, supplier stock, order quantity, and whether an approved alternative is available.
A PCB may have a relatively short fabrication cycle once materials are ready, but procurement delays can affect the overall delivery schedule. To reduce this risk, buyers should provide the following information when requesting a quotation:
Approved material specifications: Identify mandatory material grades, brands, and permitted equivalents.
Production forecast: Indicate prototype quantities, expected repeat orders, and volume requirements.
Required delivery schedule: Specify the target shipping or delivery date.
Qualification restrictions: Identify applications requiring customer approval before material changes.
These details allow manufacturers to assess material availability and production feasibility before confirming a delivery commitment. For repeat production programs, early coordination between engineering, purchasing, and manufacturing can reduce the risk of unexpected material-related delays.
How Can You Secure More Stable PCB Pricing for Repeat Orders?
Stable PCB purchasing requires more than requesting a fixed unit price. Buyers should establish a clear understanding of material assumptions, quotation validity, production quantities, and the conditions under which prices may change. The following purchasing practices can improve cost visibility:
Confirm quotation validity
Ask how long the quoted price remains valid and whether it depends on current material availability. A quotation based on existing inventory may have different conditions from one requiring new material procurement.
Provide realistic volume forecasts
Expected monthly, quarterly, or annual quantities can help manufacturers evaluate purchasing requirements and capacity planning. Forecasts are particularly useful when a project has stable specifications and predictable demand.
Control PCB revisions
Frequent revisions can make long-term material purchasing more difficult. Maintaining clear revision control helps manufacturers distinguish approved production configurations from designs still undergoing development.
Discuss material purchasing arrangements
For stable production programs, buyers may discuss scheduled releases, reserved materials, or other purchasing arrangements with their manufacturing partners. Any such arrangement should define responsibilities, quantities, pricing conditions, and inventory commitments.
Review cost changes with technical context
When a PCB quotation increases, request clarification about the affected materials or manufacturing requirements. This provides a stronger basis for cost evaluation than comparing the percentage increase alone.
Why Choose EBest Circuit for PCB Manufacturing During Material Price Fluctuations?
Rising PCB material prices make supplier selection more important. You need a manufacturing partner that can help evaluate material requirements, identify avoidable costs, and support production without sacrificing product quality.
At EBest Circuit, we support customers from PCB prototyping to volume production, providing engineering review, fabrication, component sourcing, assembly, and project-defined testing. Our services are designed to help engineering and purchasing teams address both technical requirements and manufacturing costs.
Engineering support before production: Our engineering team reviews PCB fabrication data, stackups, material requirements, and manufacturing specifications to identify potential production issues and cost optimization opportunities.
Flexible PCB manufacturing capabilities: We support standard FR-4, multilayer PCB, HDI, rigid-flex PCB, metal core PCB, ceramic PCB, and other specialized board constructions for different applications.
Material selection and DFM assistance: We help customers evaluate feasible material choices, stackup requirements, panel utilization, and fabrication specifications while preserving approved performance requirements.
Prototype-to-volume production support: We coordinate manufacturing requirements as projects progress from early prototypes to repeat production, helping customers manage design revisions and production planning.
PCB fabrication and assembly services: Customers can coordinate PCB manufacturing, component sourcing, SMT assembly, through-hole assembly, inspection, and applicable testing within one project.
Quality management and inspection: Our manufacturing support includes process controls and inspection methods selected according to the productâs requirements. Our quality management certifications include ISO 9001, ISO 13485, and IATF 16949.
With material prices changing, our goal is to help customers achieve cost-effective PCB manufacturing, reliable product quality, and practical production planning.
What Should You Prepare to Get an Accurate PCB Manufacturing Quote?
An accurate PCB quotation begins with complete manufacturing information. The more clearly your technical requirements and order expectations are defined, the easier it is to evaluate materials, processes, and costs. For a PCB fabrication quotation, prepare:
Gerber files and drill files showing the latest approved design.
PCB stackup and material specifications, including layer count, finished thickness, and required laminate properties.
Copper weight and surface finish requirements, such as ENIG, HASL, or other approved finishes.
Board dimensions and manufacturing requirements, including controlled impedance, tolerances, and special processes where applicable.
Order quantities, including prototypes, pilot production, or volume forecasts.
Delivery requirements and any restrictions on material substitution.
For PCBA projects, please also include the BOM, pick-and-place file, assembly drawings, programming requirements, and test specifications.
Concerned about rising PCB material costs?
Send your PCB manufacturing files and purchasing requirements to sales@bestpcbs.com for a quotation. Our engineering team can review your design, evaluate manufacturing feasibility, and discuss suitable material and production options for your project.
Frequently Asked Questions About PCB Material Price Increases
Q1: Will PCB prices continue to rise throughout 2026?
A1: PCB prices may remain under pressure where laminate, fiberglass fabric, copper foil, or other material supply remains constrained, but future changes depend on market conditions and product specifications.
Q2: Does the Kingboard 15% increase apply to every FR-4 PCB?
A2: No. The October 13 announcement concerns CCL and prepreg manufactured using 2116 or thinner fiberglass fabrics, rather than every FR-4 PCB construction.
Q3: Is 2116 fiberglass fabric the same as a 2116 PCB laminate?
A3: No. 2116 identifies a fiberglass fabric style used within laminate or prepreg constructions; the finished laminateâs properties also depend on its resin system and other manufacturing specifications.
Q4: Can a PCB manufacturer change the laminate brand without customer approval?
A4: Material substitution depends on the customerâs specifications and approval requirements; controlled or qualified products may require formal approval before a change.
Q5: Are PCB prototype prices affected more than mass-production prices?
A5: The impact varies because prototypes and volume orders have different material consumption, purchasing arrangements, setup expenses, and unit cost structures.
Q6: Can ordering larger quantities reduce the effects of PCB material price increases?
A6: Larger production quantities may improve unit-cost efficiency, but actual savings depend on material prices, panel utilization, setup costs, and purchasing conditions.
Q7: What happens if the specified PCB laminate is unavailable?
A7: The manufacturer should identify the supply constraint and discuss approved alternatives or revised delivery arrangements before making changes to the released design.
Q8: Can PCB and PCBA manufacturing be quoted together?
A8: Yes. A combined quotation can cover bare-board fabrication, component sourcing, assembly, and required testing when the necessary production files are available.
This website uses cookies to enhance your experience, remember your preferences, and help us understand how visitors use our site. You can accept all cookies, reject non-essential cookies, or manage your settings.
This website uses cookies to improve your experience while you navigate through the website. Out of these cookies, the cookies that are categorized as necessary are stored on your browser as they are essential for the working of basic functionalities of the website. We also use third-party cookies that help us analyze and understand how you use this website. These cookies will be stored in your browser only with your consent. You also have the option to opt-out of these cookies. But opting out of some of these cookies may have an effect on your browsing experience.
Necessary cookies are absolutely essential for the website to function properly. These cookies ensure basic functionalities and security features of the website, anonymously.
Cookie
Duration
Description
cookielawinfo-checkbox-analytics
11 months
This cookie is set by GDPR Cookie Consent plugin. The cookie is used to store the user consent for the cookies in the category "Analytics".
cookielawinfo-checkbox-functional
11 months
The cookie is set by GDPR cookie consent to record the user consent for the cookies in the category "Functional".
cookielawinfo-checkbox-necessary
11 months
This cookie is set by GDPR Cookie Consent plugin. The cookies is used to store the user consent for the cookies in the category "Necessary".
cookielawinfo-checkbox-others
11 months
This cookie is set by GDPR Cookie Consent plugin. The cookie is used to store the user consent for the cookies in the category "Other.
cookielawinfo-checkbox-performance
11 months
This cookie is set by GDPR Cookie Consent plugin. The cookie is used to store the user consent for the cookies in the category "Performance".
viewed_cookie_policy
11 months
The cookie is set by the GDPR Cookie Consent plugin and is used to store whether or not user has consented to the use of cookies. It does not store any personal data.
Functional cookies help to perform certain functionalities like sharing the content of the website on social media platforms, collect feedbacks, and other third-party features.
Performance cookies are used to understand and analyze the key performance indexes of the website which helps in delivering a better user experience for the visitors.
Analytical cookies are used to understand how visitors interact with the website. These cookies help provide information on metrics the number of visitors, bounce rate, traffic source, etc.
Advertisement cookies are used to provide visitors with relevant ads and marketing campaigns. These cookies track visitors across websites and collect information to provide customized ads.
