PCB CCL Shortage 2026: AI Server Demand Tightens Material Supply

November 9th, 2026

The PCB CCL shortage in 2026 is raising costs and complicating production schedules as AI server demand puts pressure on high-performance laminates. A November supply-chain report shows procurement lead times of 8–10 weeks for several CCL families and 24–32 weeks for selected high-performance materials. Panasonic has announced three rounds of price increases this year, while Kingboard raised prices for certain thin-glass laminates by 15% in October.

Does this mean AI server PCB production will face further delays? Which materials are hardest to source, and how much of the increase will reach finished PCB prices? Recent manufacturer announcements and supplier reports reveal where shortages are occurring, why costs continue to rise, and what engineers and buyers should check before their next production run.

PCB CCL shortage AI server 2026, https://www.bestpcbs.com/blog/2026/11/pcb-ccl-shortage-ai-server-2026/

What Is the Latest PCB CCL Shortage Update in November 2026?

As of November 9, 2026, supply shortages remain concentrated in certain CCL grades and fiberglass constructions rather than the entire laminate market. Availability has become less predictable, particularly for PCB designs requiring specific high-performance materials or thin-glass prepregs.

The clearest evidence comes from a November 4 supply-chain update by VersaLogic. Based on information from one of its PCB suppliers, the company reported CCL procurement periods of approximately 8–10 weeks for several material families, rising to 24–32 weeks for selected higher-performance grades. The supplier also identified shortages of 106, 1080, and 2116 glass fabrics, with multiple CCL manufacturers operating under allocation.

Recent capacity announcements point to the same market pressure. On October 30, Panasonic Industry unveiled a major investment in MEGTRON production, followed by Doosan's November 6 announcement of a new CCL expansion project in China. Both companies are increasing production capacity to support demand from AI infrastructure, although much of the additional output will not become available immediately.

The scale of demand is significant. In May, the Taiwan Printed Circuit Association (TPCA) forecast a US$21.5 billion global CCL market in 2026, up 34.2% year over year. This reflects projected market growth in value, not a measured shortage percentage.

For PCB buyers, the distinction matters. A project may remain on schedule if its approved materials are already available, while another could face delays because a single required laminate or prepreg construction cannot be sourced.

Why Is AI Server Demand Tightening High-Speed CCL Supply?

AI servers require complex multilayer PCBs that consume substantial amounts of specialized materials. As data center investment expands, demand for certain high-performance laminates is growing faster than qualified manufacturing capacity can respond.

Advanced AI server and networking boards can exceed 40 layers and use large PCB formats. These designs require multiple laminate cores and prepreg layers, often with tightly controlled thickness and electrical specifications. More layers and larger board areas generally increase material consumption, although the actual amount depends on the stackup and panel layout.

High-speed signal requirements further restrict sourcing options. Long electrical channels may require low dielectric loss, controlled dielectric properties, and specific copper foil characteristics. Once a material has been approved for signal integrity and reliability, changing to another grade may require additional engineering evaluation and customer approval.

Upstream manufacturing capacity is another constraint. Certain thin or specialty fiberglass fabrics require dedicated equipment and tightly controlled production processes. Adding CCL production lines cannot immediately increase output if the required glass fabric remains unavailable.

This explains why the shortage extends beyond premium AI server laminates. AI-related demand is not responsible for every supply problem, but competition for upstream fiberglass and other materials can affect conventional multilayer PCBs as well.

Which CCL Materials Are Most Affected by the 2026 Shortage?

The strongest reported supply constraints involve selected high-performance laminate grades and specific fiberglass constructions. There is no evidence that every low-loss laminate or standard FR-4 product is experiencing the same shortage.

For engineers reviewing PCB stackups, the following distinctions are important.

Material	Reported Supply Situation	What Buyers Should Verify
Selected high-performance CCL	Procurement periods of 24–32 weeks reported by one supplier	Exact grade, inventory, allocation
Several other CCL families	Procurement periods of 8–10 weeks reported	Manufacturer, thickness, delivery date
106, 1080, 2116 glass fabrics	Shortages reported within one PCB supplier network	Approved prepreg construction
M8/M9-class materials	Strong demand; availability differs by grade	Specific product and qualification
Conventional FR-4	Selected constructions exposed to glass supply and cost pressure	Core and prepreg specifications

The difference between glass fabric and finished laminate is particularly important. The numbers 106, 1080, and 2116 identify glass fabric styles, not complete CCL products. Different resin systems and laminate grades may use these fabrics, so a shortage of one construction does not establish that every related laminate is unavailable.

The same caution applies to M8/M9 terminology. These names are commonly used for high-performance material categories, but actual availability must be checked against a manufacturer's specific product. One approved grade may be available while another faces an extended procurement period.

When checking material availability, provide the manufacturer, laminate grade, core thickness, prepreg construction, copper foil requirements, and order quantity. A general inquiry about high-speed CCL rarely provides enough information for a reliable delivery commitment.

What Are Major CCL Manufacturers Reporting About Supply and Capacity?

Panasonic and Doosan have announced substantial investments in high-performance CCL production, but much of the new capacity will enter operation over the next several years. Their expansion plans suggest continued demand from AI infrastructure while highlighting the time required to increase qualified supply.

Panasonic Industry announced a JPY 92 billion AI-related investment program on October 30, including approximately JPY 67 billion for expanding MEGTRON production in Suzhou, China, and Ayutthaya, Thailand.

The company's Suzhou Phase I facility is scheduled to begin mass production in December 2026, followed by Ayutthaya Phase I in November 2027. Additional expansion phases are planned for August 2028 in Suzhou and April 2029 in Ayutthaya.

Doosan is pursuing a similar expansion strategy. Its KRW 970 billion CCL investment plan, announced in September, includes new production capacity in South Korea and China.

On November 6, Doosan confirmed a KRW 550 billion investment agreement for a new production facility near its existing Changshu plant. The project will be developed in stages, with operations expected to begin progressively in the second half of 2028.

Both manufacturers are targeting materials used in AI accelerators, network switches, optical communication equipment, and other high-performance applications.

These investments may improve supply over time, but new facilities must still complete production ramp-up and any required customer qualification. For buyers planning PCB production in the coming months, confirmed material inventory and supplier allocation remain more important than future capacity announcements.

Why Are CCL Prices Rising in 2026, and What Is the Price Trend?

CCL prices have risen repeatedly in 2026 as manufacturers face higher input costs while demand for selected laminates remains strong. Fiberglass shortages are an important factor, but resin, energy, logistics, and other manufacturing expenses are also contributing.

Kingboard's October price notice illustrates the fiberglass supply problem. The company cited strong demand for thin glass cloth, tight supplies of glass fabric and yarn, and rising upstream costs when announcing a 15% price increase for laminates and prepregs manufactured using 2116 or thinner glass fabrics.

Panasonic's announcements reflect broader cost pressure. Its June notice identified higher costs for petrochemical-derived materials, including resins and solvents, along with international logistics disruptions. Its August notice again pointed to elevated raw material, energy, auxiliary material, and transportation costs.

AI server demand has increased pressure on advanced CCL products, but it would be inaccurate to attribute every material price increase solely to AI infrastructure.

How Have CCL Prices Changed in 2026?

Panasonic announced three separate price adjustments for circuit board materials, taking effect in May, August, and September. Kingboard followed with another adjustment in October.

Effective Date	Manufacturer	General Multilayer CCL	Low-Loss / Other CCL
May 1, 2026	Panasonic	+30%	MEGTRON/XPEDION +20%
August 1, 2026	Panasonic	+20%	MEGTRON/XPEDION +10%
September 1, 2026	Panasonic	+30%	MEGTRON/XPEDION +15%
October 13, 2026	Kingboard	+15% for specified thin-glass laminates and prepregs	Depends on covered product

These figures represent the manufacturers' announced adjustments for specific materials and pricing periods. They cannot simply be added together to calculate a universal annual CCL price increase. Actual transaction prices depend on the applicable commercial terms.

The announcements nevertheless show that material cost pressure persisted through several pricing rounds during 2026.

How Much Will This Add to Finished PCB Costs?

A 20% increase in a laminate grade does not automatically mean a 20% increase in the finished PCB quotation.

CCL is only one part of total fabrication cost. Drilling, plating, imaging, lamination, inspection, testing, and other manufacturing operations also contribute to the final price.

A high-layer-count AI server PCB containing a large amount of specialized low-loss material may be more exposed to certain price increases than a simpler industrial board. Even two PCBs with the same layer count can be affected differently if their dimensions, material specifications, and panel utilization differ.

When a new quotation is higher, ask which laminate has increased in price, whether the same approved grade is still being quoted, and whether the change reflects current purchasing costs or an existing supply agreement.

That provides a more useful basis for evaluating PCB cost changes than the headline material price increase alone.

How Is the CCL Shortage Affecting AI Server PCB Manufacturing?

The main manufacturing risk is that one unavailable material can delay an otherwise production-ready multilayer PCB order. This is especially relevant to complex stackups using several different core thicknesses and prepreg constructions.

Consider a high-layer-count server PCB requiring multiple approved core and prepreg materials. The manufacturer may have sufficient inventory of most materials, but if one specified prepreg cannot be obtained, the approved layup cannot be completed. Production may be delayed before the board reaches the lamination stage.

Order quantity creates another challenge. A PCB manufacturer may have enough approved material to produce 20 prototype boards but insufficient inventory for a follow-on order of 1,000 units.

Successful prototype fabrication therefore does not guarantee that the same material will be available for mass production.

A proposed material replacement may introduce further delays. A different dielectric system can affect finished thickness, impedance, signal loss, lamination behavior, or reliability assumptions. Any necessary engineering review or qualification work must be completed before the revised construction is approved.

This is why PCB delivery schedules should account for both material readiness and available fabrication capacity. A factory may have an open production slot without having every material required to use it.

Can Engineers Replace Short-Supply CCL Materials Without Compromising PCB Performance?

An alternative CCL may be acceptable, but matching the material category or nominal Dk is not enough to establish interchangeability. High-speed PCB performance depends on the complete dielectric and conductor construction.

Panasonic's MEGTRON 8 family provides a useful example.

At 14 GHz, the manufacturer's published typical values for R-579Y(U) are Dk 3.08 and Df 0.0012, compared with Dk 3.13 and Df 0.0016 for R-579Y(N).

These values are typical test results, not guaranteed limits. Although the materials belong to the same family, their electrical properties differ. Whether those differences matter depends on channel length, operating frequency, and the available signal-loss budget.

Before approving a substitute, the engineering review should cover:

Electrical properties: Compare Dk and Df at relevant frequencies, then evaluate controlled impedance and channel loss.
Stackup construction: Confirm core thickness, cured prepreg thickness, glass style, resin content, and copper foil characteristics.
Thermal and mechanical properties: Review Tg, Td, CTE, dimensional stability, and compatibility with the required assembly cycles.
Qualification requirements: Determine whether updated simulation, prototype testing, reliability testing, or formal customer approval is required.

The review should use comparable material data and the actual finished stackup. Similar datasheet values alone do not guarantee equivalent PCB performance.

For a design already released to manufacturing, retaining the approved material and adjusting the delivery schedule may sometimes present less risk than introducing an unqualified substitute.

The decision should be based on electrical performance, manufacturing compatibility, and qualification requirements, rather than material availability alone.

What Is the Current Lead Time for High-Speed CCL Materials?

The latest supplier report published on November 4 indicates procurement periods of 8–10 weeks for several CCL families and 24–32 weeks for selected higher-performance materials.

These figures came from one PCB supplier's October update, so they should not be treated as standard lead times for every material or manufacturer.

Actual availability can differ significantly between PCB factories. One manufacturer may already hold enough approved laminate to start production, while another must wait for new material deliveries or allocation confirmation.

Material procurement must also be distinguished from PCB fabrication.

If an approved laminate is already in stock, the normal PCB manufacturing schedule may still be achievable. If the material has not been allocated, even a factory offering quick-turn PCB services cannot guarantee the original shipment date.

When reviewing a quotation, ask for three confirmed dates: material availability, planned production start, and finished PCB shipment.

A single quoted lead time is less useful when material procurement and fabrication depend on different suppliers or unresolved allocations.

How Can PCB Buyers Reduce CCL Supply and Delivery Risks?

The best time to address material shortages is before the PCB order is released, while purchasing requirements and the manufacturing schedule can still be reviewed together.

For AI server and high-speed multilayer PCB projects, buyers should focus on the following checks:

Confirm the approved material specification: Identify the exact laminate, core, prepreg, and copper foil requirements. Record any alternatives already approved by engineering.
Verify material availability: Ask whether the required quantity is physically in stock, reserved for the order, or awaiting supplier allocation.
Check prototype-to-production continuity: If prototypes are being built first, confirm how the same approved material will be secured for volume production.
Review purchasing terms: Check quotation validity, material pricing assumptions, order quantities, and conditions governing delivery changes.
Control material substitutions: Any proposed replacement should be evaluated against the released PCB specification before manufacturing proceeds.
Confirm delivery milestones: Separate material arrival, fabrication, inspection, and shipment dates rather than relying on a generic total lead time.

For repeat orders, sharing a realistic production forecast can help the PCB manufacturer coordinate purchasing arrangements with its material suppliers. However, a forecast does not reserve inventory unless a specific commitment has been agreed.

These checks reduce the risk of discovering a material shortage after a delivery date has already been promised to the end customer.

Will the PCB CCL Shortage Continue Into 2027?

Some CCL supply constraints may continue through 2027, particularly for specialized high-performance grades and fiberglass constructions. However, the market does not have one confirmed recovery date.

VersaLogic's November report included a supplier expectation that tight conditions could persist into 2027 or 2028 while manufacturers expand capacity, introduce new glass-cloth equipment, and complete material qualifications.

That is one supplier's outlook rather than a guaranteed forecast for the entire industry.

The expansion schedules announced by Panasonic and Doosan suggest that additional high-performance CCL production capacity will become available gradually.

Panasonic expects new production milestones in late 2026 and 2027, while significant additional capacity from both companies is scheduled for 2028 and beyond.

The pace of recovery will depend on how quickly new lines reach stable production, whether specialty fiberglass supplies improve, and how much of the additional output is absorbed by AI infrastructure demand.

Standard laminates and advanced low-loss products may recover at different rates.

Buyers planning PCB production in 2027 should therefore monitor approved material grades and actual supplier commitments, rather than assume that broader CCL capacity expansion will resolve every sourcing problem.

FAQs About the 2026 PCB CCL Shortage

Q1: What Is the Difference Between Copper-Clad Laminate and Prepreg?

A1: Copper-clad laminate (CCL) consists of a cured insulating substrate bonded to copper foil, while prepreg is resin-impregnated reinforcement that is not yet fully cured. During multilayer PCB lamination, prepreg bonds cores and copper layers together. Both materials are essential to the stackup, but they have different storage, processing, and handling requirements.

Q2: Does FR-4 Refer to a Specific CCL Material Grade?

A2: No. FR-4 is a broad flame-retardant glass-reinforced epoxy material designation, not a single manufacturer's product. Different FR-4 laminates can have different thermal, electrical, and mechanical characteristics. A purchasing specification should identify the appropriate material properties, grade, and applicable standards rather than relying on the FR-4 designation alone.

Q3: Does a 40-Layer PCB Require 40 Separate CCL Sheets?

A3: No. Forty layers generally refers to 40 conductive copper layers, not 40 separate laminate cores. A multilayer PCB is constructed using a combination of copper-clad cores, prepregs, and sometimes copper foils. The number of cores depends on the stackup and fabrication method, so material consumption cannot be determined from layer count alone.

Q4: What Is Fiber-Weave Skew in High-Speed PCBs?

A4: Fiber-weave skew occurs when signals experience different propagation delays because of variations in the glass and resin distribution within the dielectric. It can affect timing relationships in high-speed differential pairs. The significance depends on routing geometry, material construction, and data rate. Material selection and routing strategies can help manage the risk.

Q5: Can CCL and Prepreg Be Stored Indefinitely Before PCB Manufacturing?

A5: No. Prepreg generally has manufacturer-defined storage conditions and a recommended shelf life, while cured CCL has different handling and storage requirements. Temperature, humidity, packaging condition, and material age can affect suitability for processing. Manufacturers should follow the relevant material supplier's instructions and evaluate any material outside its recommended storage conditions before use.

Q6: What Does a CCL Certificate of Conformity Confirm?

A6: A Certificate of Conformity (CoC) generally confirms that supplied material meets the specifications or requirements identified by the issuer. It does not necessarily provide individual measured test results for every material property. Buyers should check the certificate's scope and request additional test or traceability documentation when required by the project.

Q7: Does RoHS Compliance Mean a CCL Material Is Halogen-Free?

A7: No. RoHS compliance and halogen-free requirements are different. RoHS restricts specified hazardous substances in electrical and electronic equipment, while halogen-free material requirements commonly address chlorine and bromine content under applicable specifications. A RoHS-compliant laminate is not automatically halogen-free. Both claims should be verified against the relevant requirements and supporting documentation.

Q8: Are ABF Package Substrates and AI Server PCB Laminates the Same Material?

A8: No. ABF (Ajinomoto Build-up Film) is a dielectric material used in advanced semiconductor packaging substrates, while conventional PCB CCL is typically a copper-clad reinforced laminate. The materials serve different manufacturing and performance requirements. Although both supply chains can be influenced by AI hardware demand, their production capacities and shortage conditions should be evaluated separately.

The PCB CCL shortage in 2026 is being shaped by strong AI server demand, tight supplies of certain fiberglass constructions, and repeated increases in material and manufacturing costs. For PCB engineers, the priority is protecting the approved stackup and electrical performance; for buyers, it is securing material quantities and delivery commitments before production begins.

If you are planning a high-speed, multilayer, or AI server PCB project, EBest Circuit offers PCB fabrication, assembly, and a free DFM check. Send your Gerber files, approved stackup, material specifications, order quantity, required delivery date, and delivery location to sales@bestpcbs.com for a manufacturing review and quotation.

Thermal Pad MCPCB: Design, Materials and Selection

October 31st, 2026

A thermal pad MCPCB commonly refers to a metal-core board that connects an LED’s thermal pad to a metal pedestal through a solder joint, bypassing the dielectric beneath that pad. This direct thermal path can reduce one part of the heat-flow resistance. It works only when the package’s electrical connections and the board’s isolation scheme allow that connection.

The first design decision is therefore electrical as well as thermal: can the LED’s heat-transfer pad safely connect to the metal base? Once that is established, compare the complete path through the package, solder, board, mounting interface and heat sink.

Conceptual 3D cutaway of an LED thermal pad soldered directly onto an integral copper pedestal, with dielectric only beneath adjacent circuit pads

Key Takeaways

A direct thermal path bypasses dielectric locally beneath the LED thermal pad; other circuitry still needs insulation.
A copper base alone does not prove that a board has a direct thermal path.
Dielectric thickness, conductivity and effective heat-transfer area must be considered together.
A board-to-heat-sink interface pad serves a different purpose from a solderable thermal land.
Verify package compatibility, solder quality and operating temperature before approving a stack-up.

What Does “Thermal Pad MCPCB” Mean?

In LED board discussions, the term often describes a direct-thermal-path MCPCB rather than a soft pad placed under a circuit board. A metal pedestal reaches the LED’s thermal contact location, with a soldered connection between the package and pedestal.

PCB thermal pads can refer to different parts. Three related parts are easy to confuse:

Package thermal pad: the exposed heat-transfer surface on the underside of the LED or component.
Board thermal land: the solderable surface that mates with that package pad.
Thermal interface pad: a separate material between the board base and heat sink.

For a thermal pad PCB, specify which one you mean on drawings and quotation requests. Asking for a “thermal pad” without a cross-section can result in a different construction from the one intended.

Generic LED underside and matching DTP board showing separate anode, neutral thermal pad and cathode contacts

How Does a Direct Thermal Path Differ from a Conventional MCPCB?

A conventional insulated MCPCB carries heat through its dielectric before it reaches the metal base. A direct thermal path bypasses that dielectric at the designated thermal contact while retaining electrical insulation beneath the surrounding circuit.

Cree LED describes heat flowing from the LED package through its thermal pad into the PCB and onward to a heat sink. Adura’s SinkPAD description explains the local dielectric bypass and specifies compatibility with electrically neutral thermal pads. Neither principle makes every LED package interchangeable.

At EBest Circuit, we provide metal-core PCB manufacturing and PCB assembly services. For a thermal-pad design, send the LED part number and proposed stack-up together so we can review the board and assembly requirements against the same package information.

Conceptual 3D cross-sections comparing continuous dielectric beneath a conventional MCPCB thermal land with a direct copper pedestal path

Which Material Parameters Should You Compare?

Compare dielectric thickness and dielectric thermal conductivity on the same basis before comparing material grades. A conductivity value for a metal base or a complete test structure cannot simply replace the dielectric value.

The following published Henkel/Bergquist examples describe Thermal Clad dielectric grades. They are reference material data, not measured performance or confirmed stock for an EBest Circuit board.

Dielectric Grade	Thickness (µm)	Dielectric k (W/m·K)
HT-04503	76	2.2
HT-07006	152	2.2
MP-06503	76	1.3

Source and conditions: Henkel/Bergquist’s Thermal Clad Comprehensive Selection Guide, dielectric selection table. Thickness uses an optical method; dielectric conductivity uses extended ASTM D5470. Values are published reference characteristics. The table does not provide a temperature-specific curve, so these numbers should not be treated as guaranteed across the operating range.

HT-04503 and HT-07006 illustrate why thickness matters: their listed dielectric conductivity is the same, but their thickness differs. MP-06503 provides a same-thickness comparison with HT-04503. Confirm the current grade, construction and applicable data sheet before ordering.

When Should You Choose a Conventional or Direct-Path Board?

Choose a conventional insulated MCPCB when its verified thermal performance and electrical isolation meet the design. Evaluate a direct-path structure when resistance beneath a compatible package pad is a significant part of the thermal budget.

Selection Point	Conventional MCPCB	Direct Thermal Path
Below the thermal land	Dielectric separates land and base	Metal connection bypasses dielectric locally
Electrical relationship	Land remains isolated by the specified dielectric	Thermal contact connects electrically to the base
Package suitability	Depends on isolation and heat budget	Requires a compatible pad connection and geometry
Primary selection trigger	Specified isolation and temperature target are met	Local dielectric resistance needs reduction
Heat-sink interface	Still needs a suitable mounting interface	Still needs a suitable mounting interface

A direct-path board does not remove the package’s internal thermal resistance or the heat sink’s limits. If the dominant problem is a poor mounting interface or inadequate cooling to ambient, changing the board alone may deliver little improvement. Compare alternatives with the same LED, heat load, mounting arrangement and ambient conditions.

How Can You Estimate Dielectric Thermal Resistance?

For a uniform layer carrying heat straight through its thickness, estimate MCPCB thermal resistance with R = t / (k × A). Use thickness t in metres, conductivity k in W/m·K and area A in m²; the result is K/W.

Calculated example, not a test result: assume a 100 µm dielectric, conductivity of 2 W/m·K and a uniform 5 × 5 mm heat-transfer area.

t = 0.0001 m
A = 0.005 × 0.005 = 0.000025 m²
R = 0.0001 ÷ (2 × 0.000025) = 2 K/W
At an assumed 3 W of heat crossing that layer, ΔT = 3 × 2 = 6 K.

This simplified calculation excludes lateral spreading, solder and mounting contact resistance, package resistance, temperature-dependent properties and parallel heat paths. It is useful for comparing variables, not predicting an assembled LED’s junction temperature. Use heat dissipated into the path, rather than automatically treating all electrical input as heat.

How Should You Define the Thermal Pad and Electrical Isolation?

PCB thermal pad design starts with the exact component’s recommended land pattern and pad connection. There is no universal MCPCB thermal-pad size that fits every LED with the same external package dimensions.

Identify the pad’s electrical function. Confirm whether it is neutral, connected to an electrical terminal, or subject to a specified connection requirement.
Match the footprint. Check the thermal contact, anode, cathode, orientation and clearances against the current package drawing.
Define the cross-section. Show where dielectric remains and where the thermal contact joins the metal base.
Review the enclosure connection. Decide whether the base is floating, grounded or connected mechanically to conductive parts.
Approve assembly geometry. Confirm pedestal height, coplanarity and solder-joint requirements with the board and assembly teams.

Do not connect an electrically active thermal pad to a common metal base merely because the footprint fits. An unexpected base connection can change the circuit or create a short. Package documentation and the approved isolation design take priority over a generic board drawing.

Does a Direct-Path MCPCB Still Need Thermal Interface Material?

It may still need interface material between the metal base and heat sink because a direct path inside the board does not eliminate the separate mounting interface.

Choose an interface for the actual gap, surface flatness, clamping arrangement and electrical isolation requirement. A compliant pad may accommodate a gap that a thin grease layer cannot; adding unnecessary thickness can also increase resistance. Use the interface supplier’s pressure and thickness data for the selected product.

Do not insert a soft gap pad into a location designed for a soldered LED thermal contact. Those materials perform different jobs and require different assembly conditions.

Conceptual MCPCB mounting cutaway showing the interface material between the metal base and aluminum heat sink, with an insulated mounting screw

How Do You Verify the Assembled Thermal Path?

Verify electrical isolation and operating temperature in the final mounting arrangement; a successful continuity test alone does not establish thermal performance.

Before assembly: compare the approved stack-up, package drawing, thermal contact location and circuit isolation.
During assembly validation: confirm paste deposition, placement and a reflow profile suitable for the component and board. Use supplier guidance rather than a universal temperature setting.
After reflow: inspect hidden solder contacts with an appropriate method. Define voiding criteria for the actual package and application; do not adopt an unsupported universal percentage.
During operation: record ambient conditions, drive current, mounting pressure or torque, interface material and measurement location. Run until temperatures stabilize.
Before release: compare measured values and any junction-temperature estimate with the component’s specified limits and the project’s approved margin.

Stop the test if temperature exceeds the approved limit, rises abnormally, or electrical isolation fails. Review the suspected cause, make a controlled correction and repeat the same test conditions. An infrared image can locate a hot region, but it does not by itself prove the junction temperature or the cause of overheating.

Conceptual cross-sections comparing continuous solder contact with enclosed solder voids beneath an LED thermal pad; not a real inspection image

What Should You Send Us for a Thermal Pad MCPCB Review?

Send the LED part number, manufacturing files and mounting details so we can assess the intended heat path and board requirements together.

Gerber files, board outline and a proposed cross-section.
LED data sheet, land pattern and thermal-pad electrical connection.
Base material, dielectric grade and thickness, copper weight and surface finish.
Heat load or operating conditions, temperature target and heat-sink interface.
Quantity, assembly scope and required electrical and thermal checks.

For related construction options, see our direct-thermal-path board page. Email the project files to sales@bestpcbs.com. We will review the requested structure; material availability, pad geometry and acceptance requirements need confirmation for the actual design.

BT Resin PCB: Stackup Design and Manufacturing Process

October 23rd, 2026

A BT resin PCB uses Bismaleimide-Triazine (BT) resin-based laminate for applications requiring thermal stability, controlled electrical performance, and dimensional accuracy. Its stackup must account for dielectric thickness, copper geometry, and material properties, while manufacturing requires suitable lamination and drilling processes.

For thin multilayer boards, small changes in dielectric spacing, copper distribution, or processing conditions can affect impedance and warpage. EBest Circuit provides custom PCB manufacturing and DFM support to help customers review these requirements before fabrication.

BT resin PCB, https://www.bestpcbs.com/blog/2026/10/bt-resin-pcb/

What Should You Consider Before Designing a BT Resin PCB Stackup?

Define the BT laminate grade, layer count, finished thickness, and electrical requirements before arranging the copper layers. These specifications determine whether the stackup can meet the required electrical and mechanical performance.

Four areas deserve attention:

BT Laminate: Specify the Bismaleimide-Triazine material grade and compatible core and prepreg. Different formulations have different dielectric properties, thickness options, and processing requirements.
Board Construction: Confirm the layer count, finished thickness, and copper weight to determine the space available for dielectric layers.
Electrical Requirements: Identify signal layers, reference planes, target impedance, and operating frequency before selecting dielectric spacing.
Mechanical Requirements: Define via structures, dimensional tolerances, and allowable warpage, especially for thin boards.

The laminate grade should be confirmed before finalizing the impedance geometry. Replacing the material later may change the required trace dimensions or dielectric construction. The selected grade’s Bismaleimide-Triazine resin properties should match the project’s electrical and thermal requirements.

What Does a 4-Layer BT Resin PCB Stackup Look Like?

A 4-layer BT resin PCB stackup can use two outer signal layers separated by internal ground and power planes. BT-based core material and compatible prepregs provide electrical insulation and mechanical support.

A four-layer construction can use the following layer arrangement and nominal dimensions.

Layer or Material	Thickness	Function
L1 – Signal Copper	18 µm nominal	Signal routing and component pads
BT Prepreg	0.10 mm cured target	Dielectric between L1 and L2
L2 – Ground Plane	18 µm nominal	Signal reference and return path
BT Core	0.20 mm dielectric	Structural support and insulation
L3 – Power Plane	18 µm nominal	Power distribution
BT Prepreg	0.10 mm cured target	Dielectric between L3 and L4
L4 – Signal Copper	18 µm nominal	Bottom-side signal routing

The specified dielectric thicknesses total 0.40 mm, while four nominal 18 µm copper layers contribute 0.072 mm. Their combined nominal thickness is approximately 0.472 mm, before additional outer-layer plating, solder mask, and finishing effects.

The finished thickness depends on cured prepreg dimensions, finished copper thickness, and fabrication tolerances. Core and prepreg thicknesses must also be available in the selected BT laminate system.

The L1–L2 dielectric spacing affects top-layer impedance, while L4 can use L3 as a reference where the plane provides a suitable continuous return path. Copper coverage and plane continuity must also be considered when assessing electrical performance and mechanical balance.

How Do Copper Thickness and Dielectric Spacing Affect BT PCB Impedance?

Increasing dielectric spacing generally raises microstrip impedance, while increasing trace width or copper thickness generally lowers it. The actual impedance depends on trace geometry and the dielectric constant (Dk) of the selected Bismaleimide-Triazine laminate.

Parameter Change	Impedance Effect	Design Adjustment
Increase Dielectric Thickness	Generally increases	Adjust trace width if necessary
Increase Trace Width	Decreases	Check spacing and routing clearance
Increase Copper Thickness	Generally decreases	Calculate using finished conductor geometry
Increase Dk	Decreases	Recalculate for the selected laminate grade
Change Etched Trace Geometry	Changes impedance	Account for finished trace width and profile

Consider a 50 Ω single-ended microstrip with 0.10 mm dielectric spacing. If the spacing is reduced to 0.075 mm while the conductor geometry remains unchanged, impedance will generally decrease.

Restoring the target impedance may require a narrower trace. However, the reduced width must remain within the manufacturer’s achievable fabrication limits.

Before finalizing controlled-impedance routing:

Confirm Dk: Use material data at the relevant operating frequency.
Calculate Impedance: Model the finished copper geometry and dielectric spacing.
Check Trace Dimensions: Verify minimum line width, spacing, and manufacturing tolerances.
Specify Test Requirements: Define target impedance, tolerance, and verification method.

For high-frequency applications, dissipation factor (Df) and copper roughness also affect transmission loss. A trace that meets its impedance target may still have unacceptable insertion loss.

What Trace and Via Design Rules Apply to BT Resin PCBs?

BT resin PCB routing limits depend on copper thickness, dielectric construction, and hole-processing capability. The resin type alone does not determine the minimum trace width or via diameter.

Trace Width and Spacing: Fine-line capability depends on copper thickness, imaging accuracy, and etching control. Specify the required finished conductor dimensions.
Through-Hole Vias: Drill diameter, aspect ratio, annular ring, and plating thickness must be compatible with the finished board thickness.
Blind Vias and Microvias: Confirm that the selected BT dielectric supports the required laser-drilling and metallization processes. Via depth, diameter, and capture pad dimensions must be evaluated together.
BGA Fanout: Review pad pitch, available routing channels, and via placement before selecting the interconnection structure.

Reducing via diameter can create additional routing space, but the smaller via must still provide reliable interlayer connections.

For dense multilayer layouts, the smallest trace features and any nonstandard via structures should be reviewed against the selected BT laminate and fabrication method. Semiconductor package-substrate design rules should not be applied automatically to conventional multilayer BT resin PCBs.

How Can You Design a BT Resin PCB Stackup to Reduce Warpage?

A symmetrical dielectric construction, balanced copper distribution, and suitable board thickness help reduce warpage in thin BT resin PCBs. These measures limit uneven thermal and mechanical stresses that can cause bending during manufacturing or assembly.

Five design measures are particularly useful:

Keep the Stackup Symmetrical: Arrange corresponding copper and dielectric layers around the board center wherever practical.
Balance Copper Coverage: Reduce unnecessary differences in copper density between opposite layers without compromising electrical performance.
Consider Material CTE: Select a Bismaleimide-Triazine laminate with thermal expansion and dimensional stability appropriate for the application.
Check Board Thickness: Very thin boards have lower bending stiffness. Increasing thickness where the product allows can improve mechanical stability.
Set Flatness Requirements: Define the acceptable bow, twist, or application-specific warpage limits in the fabrication drawing.

For boards exposed to lead-free reflow, thermal expansion mismatch and uneven copper distribution can increase deformation during heating. The specified flatness requirements should reflect the intended assembly conditions.

How Are Bismaleimide-Triazine PCBs Manufactured?

BT resin PCB manufacturing requires material-specific control during lamination, drilling, and hole preparation. These operations must match the selected Bismaleimide-Triazine laminate rather than relying on a universal processing recipe.

Step 1: BT Laminate Preparation

Confirm the BT core, prepreg, copper thickness, and material grade. Storage and moisture handling follow the laminate supplier’s requirements.

Step 2: Inner-Layer Circuit Formation

Inner copper layers are patterned and inspected. Compatible copper surface treatment prepares them for reliable bonding during lamination.

Step 3: Multilayer Lamination

BT cores and prepregs are aligned and pressed under controlled conditions. Curing temperature, pressure, and time must match the resin system to achieve the required bonding and dielectric thickness.

Step 4: Drilling and Desmear

Mechanical drilling forms through-holes, while suitable laser processes may create microvias. Resin smear must be removed from exposed inner-layer copper before metallization. Plasma or compatible chemical treatments are selected according to the BT formulation.

Step 5: Copper Metallization and Circuit Formation

Prepared holes are metallized and plated. Outer-layer circuits are formed, with finished copper thickness and trace geometry controlled against the approved fabrication specifications.

Step 6: Surface Finish and Inspection

Solder mask, the specified surface finish, and profiling are completed. Inspection covers layer registration, hole metallization, dimensions, and electrical continuity, with impedance or warpage checks where required.

BT Resin PCB Manufacturing Example: A Thin 6-Layer Stackup

A thin six-layer BT resin PCB with controlled-impedance routing requires coordinated checks of dielectric thickness, copper balance, and via geometry before fabrication. Consider the following engineering scenario for a compact communication module.

Project Background

The proposed board has six copper layers, a target finished thickness of 0.80 mm, and 50 Ω single-ended signal routing. Bismaleimide-Triazine laminate is specified for its required electrical and dimensional characteristics.

Manufacturing Requirements and Challenges

The limited board thickness leaves little room for the dielectric layers, copper, and plating. Uneven copper distribution can increase warpage risk, while changing dielectric spacing to meet the thickness target may alter impedance. Fine-pitch connections also require confirmation of the via structure.

Engineering Solution

The proposed manufacturing review addresses three issues:

Stackup Adjustment: Check the available BT core and prepreg constructions, maintain a balanced layer arrangement, and recalculate impedance using the final dielectric spacing.
Copper and Via Review: Compare copper distribution between corresponding layers and verify that the required via dimensions are compatible with the board thickness.
Manufacturing Verification: Specify finished thickness, impedance tolerance, flatness limits, electrical testing, and any required structural inspection.

Expected Verification Results

The design can proceed to fabrication approval when the material construction and manufacturing limits have been confirmed. The finished boards must then be checked against the specified 0.80 mm thickness target, 50 Ω impedance requirement, and agreed flatness limits.

These are proposed design and acceptance requirements for an illustrative engineering scenario, not measurements from a completed production lot.

Why Choose EBest Circuit for BT PCB Manufacturing?

EBest Circuit provides PCB manufacturing, DFM support, and documented quality control to help customers move from approved stackup specifications to production.

Material and Stackup Review: Review BT laminate specifications, copper construction, dielectric thickness, and manufacturing compatibility before fabrication.
DFM Support: Identify potential fabrication problems involving trace dimensions, via structures, layer alignment, and board thickness.
Engineering Coordination: Support technical communication between project review, manufacturing, and quality control. For projects that also require PCBA, EBest Circuit’s 1+3 technical team covers PE, DFM, Process, and Quality functions.
Quality and Traceability: EBest Circuit maintains ISO 9001, ISO 13485, IATF 16949, and AS9100D certifications, with applicable manufacturing records retained for up to 15 years.
Prototype to Volume Production: Support sample fabrication and repeat production using approved manufacturing specifications.

BT laminate availability and specialized fabrication capabilities are evaluated for each project, allowing material and processing restrictions to be identified before production.

Send your BT resin PCB manufacturing requirements to sales@bestpcbs.com for DFM review and a quotation.

What Do You Need for a BT Resin PCB Manufacturing Quote?

Provide the fabrication files, BT laminate specification, stackup, and production requirements. These details allow the manufacturer to evaluate material availability and fabrication feasibility.

Fabrication Files: Gerber or ODB++, NC drill files, and fabrication drawing.
BT Material: Manufacturer, laminate grade, core, prepreg, and approved substitutions.
Stackup: Layer count, finished thickness, copper thickness, and dielectric spacing.
Electrical Specifications: Impedance targets, tolerances, and required electrical tests.
Manufacturing Requirements: Minimum trace dimensions, via structures, surface finish, and flatness limits.
Order Details: Quantity, delivery requirements, and shipping destination.

If the BT laminate grade has not been finalized, provide the required electrical, thermal, and mechanical specifications for manufacturing review.

FAQ About BT Resin PCB Manufacturing

Q1: Can a BT resin PCB have more than four layers?

A1: Yes. Multilayer constructions are possible when the selected BT core, prepreg, and fabrication process support the required structure.

Q2: Can BT resin laminate be combined with other dielectric materials?

A2: Yes, in a qualified hybrid construction. Lamination compatibility, CTE, adhesion, and dielectric properties must be evaluated.

Q3: Does BT resin require a special surface finish?

A3: Not necessarily. ENIG, ENEPIG, and other compatible finishes can be selected according to soldering, bonding, and product requirements.

Q4: Can a BT resin PCB withstand lead-free reflow?

A4: Many BT laminate grades support lead-free assembly. Acceptable reflow conditions depend on the material, board construction, and moisture condition.

Q5: Should BT prepreg be baked before lamination?

A5: Follow the supplier’s prepreg storage and handling requirements. Unapproved baking may affect the partially cured resin’s processing behavior.

Q6: How can BT laminate traceability be verified?

A6: Request material identification, supplier records, and applicable lot traceability linked to the manufacturing order.

Q7: What can cause delamination in a BT resin PCB?

A7: Possible causes include moisture, inadequate bonding, incompatible processing conditions, or excessive thermal stress. The actual cause requires inspection and failure analysis.

Q8: Can an approved BT laminate be replaced with another grade?

A8: Only after comparing dielectric properties, thermal expansion, available thicknesses, and processing compatibility, followed by customer approval.

Conclusion

A reliable BT resin PCB requires a suitable Bismaleimide-Triazine laminate, a balanced stackup, and compatible manufacturing processes. Dielectric spacing, copper geometry, via construction, and warpage requirements should be established before fabrication to reduce production risks.

Need custom BT resin PCB manufacturing? EBest Circuit provides DFM review and PCB fabrication support from prototype through production. Send your Gerber files, stackup, BT laminate specifications, and order quantity to sales@bestpcbs.com for manufacturing feasibility review and quotation.

Bismaleimide Triazine (BT Resin): Properties, BT Epoxy & FR-4 Comparison

September 18th, 2026

Bismaleimide triazine has become an important resin system for electronic materials that need more dimensional and thermal stability than conventional PCB laminates can provide. It is particularly well known in semiconductor packaging, where thin substrates, fine interconnections, repeated reflow cycles, and moisture sensitivity place tight demands on the laminate.

However, the terminology around BT materials is often inconsistent. BT resin, BT epoxy, BT laminate, BT PCB, and BT substrate do not mean exactly the same thing. Understanding these distinctions is important before comparing material properties or releasing a PCB or substrate specification.

Bismaleimide Triazine BT resin with multilayer PCB laminate and semiconductor package applications

Key Takeaways

Bismaleimide triazine, commonly called BT resin, is a high-performance thermosetting resin system used in PCB laminates and semiconductor package substrates.
BT is a material family rather than one fixed laminate grade. Tg, Dk, Df, CTE, moisture absorption, and other properties vary with resin formulation, reinforcement, fillers, and cure system.
BT epoxy usually refers to a BT resin system modified or blended with epoxy to improve processability, adhesion, toughness, resin flow, or other manufacturing characteristics.
BT laminate, BT PCB, and BT substrate are different terms: the first describes the supplied material, while the latter two describe finished electronic structures.
Compared with standard FR-4, BT materials are commonly selected where dimensional stability, thermal performance, moisture control, and package warpage are more demanding.
BT resin is widely associated with BGA, CSP, SiP, memory, and other organic semiconductor package substrates.
BT is not automatically better than FR-4. Standard or high-Tg FR-4 remains more practical for many conventional multilayer PCBs.
Engineers should specify an exact material manufacturer and grade instead of requesting only “BT material.”

What Is Bismaleimide Triazine (BT Resin)?

Bismaleimide triazine, or BT resin, is a high-performance thermosetting resin system based primarily on bismaleimide and cyanate-ester chemistry. It is widely used in electronic laminates and organic semiconductor package substrates.

The search phrase bismaleimide triazine BT resin refers to this formulated resin family rather than one universal commercial grade.

During curing, the reactive resin components form a highly crosslinked three-dimensional network. This structure can provide a useful combination of:

High glass-transition temperature
Dimensional stability
Low moisture absorption
Thermal resistance
Electrical insulation
Controlled dielectric properties
Good compatibility with multilayer structures

BT resin is not one single chemical compound or one fixed commercial material. Different suppliers can modify the formulation with epoxy, fillers, catalysts, flame retardants, reinforcement, and other additives.

For this reason, an engineer should not assume that every BT laminate has the same Tg, Dk, Df, CTE, or processing conditions.

How Is Bismaleimide Triazine Resin Structured and Cured?

BT resin should be understood as a crosslinked resin system rather than a single molecule with one fixed structure.

A bismaleimide triazine structure is best described as a cured network whose final properties depend on formulation and processing.

Its chemistry generally combines bismaleimide functionality with cyanate-ester chemistry. During curing, cyanate groups can react to form thermally stable triazine-ring structures, while the bismaleimide portion contributes additional crosslinking and heat resistance.

A simplified reaction concept is:

Bismaleimide + Cyanate-Ester Chemistry → Thermal Cure → Crosslinked BT Resin Network

The resulting network can be further modified to balance electrical, mechanical, and processing properties.

Bismaleimide Component

The bismaleimide portion contributes thermal stability and a highly crosslinked structure. Pure BMI systems can be relatively rigid or brittle, so practical electronic formulations are often modified.

Cyanate-Ester Component

Cyanate groups form triazine-ring structures during curing. These structures are associated with high-temperature performance and useful dielectric characteristics.

Modifiers

Commercial BT systems may incorporate epoxy or other modifiers to improve flow, toughness, adhesion, cure behavior, and PCB processing.

Therefore, drawings that show one exact “BT molecule” can be misleading. The material used in an actual laminate is a formulated thermoset system.

What Is the Difference Between BT Resin, BT Epoxy, BT Laminate and BT Substrate?

These terms describe different stages or forms of the material system.

Term	Meaning
BT resin	Bismaleimide-triazine thermosetting resin chemistry
BT epoxy	BT resin system modified or blended with epoxy
BT prepreg	Reinforcement impregnated with partially cured BT-based resin
BT laminate	Cured reinforced sheet material made with a BT resin system
BT PCB	Printed circuit board fabricated using BT-based laminate
BT substrate	Finished semiconductor package substrate using BT-based material

The distinction matters during RFQ and material selection. Asking for “BT resin” does not tell a PCB manufacturer which laminate construction, copper foil, glass style, resin content, or cured thickness to use.

Similarly, a BT substrate is not merely a sheet of BT laminate. It is a finished interconnect structure that can contain fine traces, microvias, solder-mask or build-up layers, package pads, and other features.

For more detail on package construction, SAP/mSAP processing, and BT vs ABF, see our BT Substrate: Material, Process and ABF Comparison guide.

BT resin BT epoxy BT laminate and BT substrate terminology comparison

What Properties Matter in a BT Resin Laminate?

The most important BT laminate properties depend on the application. Package substrates may prioritize dimensional stability and moisture behavior, while high-speed boards may place greater emphasis on Dk and Df.

Property	Why It Matters
Tg	Dimensional and mechanical behavior through thermal cycles
Td	Thermal decomposition resistance
X/Y CTE	In-plane dimensional stability
Z-axis CTE	Via and plated-hole reliability
Dk	Impedance, propagation velocity, and trace geometry
Df	Dielectric contribution to signal loss
Moisture absorption	Package reliability and reflow behavior
Peel strength	Copper-to-laminate adhesion
Flexural/mechanical properties	Thin-substrate handling and package stability

The values cannot be generalized to every BT material. For example, AGC’s N5000 is a commercially available BT epoxy laminate and prepreg with published dielectric values around Dk 3.6 and Df 0.01 under its specified test conditions.

Those numbers should be treated as one material-grade example, not as a universal BT specification.

Research and commercial formulations can show substantially different Tg and dielectric performance because resin chemistry, fillers, glass reinforcement, resin content, and test method all influence the result.

Always compare exact material grades using the same test method and frequency.

Key BT resin laminate properties including Tg Dk Df CTE moisture and thermal resistance

Why Is BT Resin Used for BGA, CSP and IC Package Substrates?

BT resin is widely used in organic package substrates because semiconductor packaging requires more than ordinary PCB electrical insulation.

A bismaleimide triazine substrate uses this material family to support fine package interconnections and repeated thermal cycles.

A package substrate must maintain dimensional control while dealing with:

Fine-pitch package routing
Thin core and dielectric structures
Multiple lead-free reflow cycles
Silicon-to-substrate CTE mismatch
Moisture exposure
BGA or CSP warpage
Fine via and pad registration
Package assembly stress

BT-based laminates can provide a useful balance of high-temperature stability, low moisture uptake, mechanical rigidity, and electrical performance.

This is particularly important in thin BGA and CSP structures. Even small dimensional changes can affect solder-ball coplanarity, substrate warpage, trace registration, or package reliability.

BT materials are therefore commonly associated with:

BGA substrates
CSP substrates
Memory packages
SiP modules
Flip-chip package structures
RF and communication modules

The final substrate performance still depends on the exact BT grade, stackup, copper pattern, package size, substrate thickness, and manufacturing process.

Bismaleimide Triazine applications including BGA substrate CSP memory package and RF module

BT Resin vs FR-4: What Is the Difference?

FR-4 and BT resin laminates are both organic electronic materials, but they are normally selected for different performance and cost targets.

Factor	FR-4	BT Resin Laminate
Primary use	General PCB manufacturing	Package substrates and higher-reliability structures
Resin system	Primarily epoxy-based	BT or BT-epoxy-based
Tg	Wide range by grade	Often high, but grade-dependent
Dimensional stability	Suitable for conventional PCB	Better suited to demanding package control
CTE control	Depends on grade and reinforcement	Low-CTE formulations available
Moisture behavior	Grade dependent	Often selected for lower moisture sensitivity
Dielectric properties	Standard to low-loss grades available	Grade dependent; can be optimized for package/high-speed use
Thin-substrate use	Possible but not its main strength	Common in package substrate applications
Processing familiarity	Very mature	More material-specific
Material cost	Lower	Generally higher

The main difference is not simply that BT has a higher Tg. High-Tg FR-4 materials can also provide strong thermal performance.

BT becomes more attractive when several requirements appear together, such as high dimensional stability, low package warpage, moisture resistance, thin substrate construction, repeated reflow reliability, and fine-pitch interconnection.

FR-4 remains the more economical and widely available choice for most conventional PCBs.

Is BT Resin Always Better Than FR-4?

No. BT resin is not automatically a better PCB material than FR-4. It is better suited to certain applications where its material characteristics solve specific reliability or dimensional problems.

Standard or high-Tg FR-4 is usually the practical choice for:

Industrial control boards
Consumer electronics
General multilayer PCBs
Power-control boards
Cost-sensitive products
Conventional SMT assemblies
Moderate-density HDI designs

BT becomes more attractive when the product requires:

Semiconductor package substrate construction
Very thin organic substrates
Tighter dimensional stability
Lower package warpage
Fine-pitch BGA or CSP structures
Low moisture sensitivity
Higher package-level thermal reliability

Using BT where ordinary FR-4 already meets the electrical and reliability requirements can increase material cost and supply complexity without creating a meaningful product benefit.

The correct decision should come from the complete stackup, package geometry, thermal cycle, electrical requirements, warpage target, and qualification specification.

Where Is Bismaleimide Triazine Used in Electronics?

Bismaleimide triazine materials are most strongly associated with semiconductor packaging, but their use is not limited to one product type.

A bismaleimide triazine PCB may also be specified when a conventional board needs the qualified thermal or dimensional behavior of a BT laminate.

Common applications include:

BGA package substrates
CSP substrates
Memory package substrates
System-in-Package modules
RF modules
Communication modules
Selected LED package substrates
High-reliability electronic modules
Selected high-frequency PCBs
Thin multilayer interconnect structures

A BT laminate can also be used for conventional PCB structures when its thermal or dimensional characteristics provide a useful engineering advantage.

However, it should not be assumed that every high-speed PCB needs BT resin. Modern high-speed boards can use multiple material families, including low-loss FR-4 derivatives, PPE/PPO systems, PTFE-based laminates, hydrocarbon ceramics, and other specialty materials.

The application requirement should determine the laminate family, not the material’s reputation alone.

What Are the Manufacturing Challenges of BT Epoxy Laminate?

BT epoxy laminate can require tighter material and process control than a standard FR-4 production flow.

Important manufacturing factors include:

Material storage
Moisture control
Prepreg handling
Lamination temperature and pressure
Resin-flow control
Cure profile
Dimensional movement
Drilling parameters
Desmear conditions
Copper adhesion
Thin-board handling
Warpage control

Moisture Management

Low moisture absorption is an important material characteristic, but storage and handling still matter. Prepreg and thin laminate structures should follow supplier recommendations.

Lamination

BT resin flow and cure behavior differ by formulation. The press cycle should follow the actual laminate supplier’s process window rather than an FR-4 recipe being reused automatically.

Drilling and Hole Preparation

Drill parameters, smear behavior, and desmear chemistry can depend on the cured resin system and glass construction.

Dimensional Stability

Package substrates and thin BT boards may require tighter compensation because small X/Y movement can affect fine-pitch registration.

Warpage

Thin BT-based structures can still warp if copper distribution, build-up symmetry, substrate thickness, package design, or lamination stress is unbalanced. A high-performance resin does not eliminate the need for mechanical stackup control.

How Should Engineers Specify BT Material for PCB Fabrication?

A production drawing should identify the exact BT laminate requirements rather than simply stating “BT material.”

Useful information includes:

Material manufacturer
Exact material grade
Core or prepreg designation
Finished dielectric thickness
Glass style
Resin content
Copper foil type and weight
Tg and test method
Dk and Df test frequency/method
X/Y and Z-axis CTE where critical
Moisture requirement
Finished board thickness
Surface finish
Controlled impedance
Approved alternative materials

For high-frequency designs, Dk and Df values should be tied to the relevant test method and frequency. A Dk value measured by one method should not automatically replace a design Dk obtained through another method.

For thin or packaging-related structures, engineers should also specify dimensional, warpage, and registration requirements where applicable.

“Use BT material” is not enough for a controlled production release. Two BT laminates may differ significantly in processing behavior and electrical performance.

BT laminate specification guide including material grade Tg Td Dk Df glass style copper type and thickness

When Should You Choose BT Resin Instead of Another PCB Material?

Material selection should start from the product requirement rather than choosing BT first and designing around it.

Requirement	Material Direction to Consider
General multilayer PCB	Standard or high-Tg FR-4
Cost-sensitive electronics	FR-4
High-reliability conventional PCB	High-Tg / specialty FR-4
BGA/CSP organic package substrate	BT resin commonly considered
Thin warpage-sensitive package	BT or another qualified package substrate material
Very high-speed PCB	Low-loss FR-4, PPE/PPO, PTFE/hydrocarbon or other high-speed materials
Flexible circuit	Polyimide
Very high thermal conductivity	Ceramic or metal-based structures
Advanced high-density IC build-up	BT core, ABF, or other package-specific systems

BT is strongest when thermal, moisture, dimensional, and package-level requirements need to be balanced in one organic material system.

It is not necessarily the first choice for ultra-high-frequency transmission, extreme thermal conductivity, flexible construction, or every advanced IC substrate architecture.

The material decision should therefore consider the entire structure: electrical performance, package geometry, process capability, reliability, cost, supply availability, and customer qualification.

FAQ About Bismaleimide Triazine

1. What does BT stand for in PCB materials?
BT stands for Bismaleimide Triazine, a high-performance thermosetting resin system used in electronic laminates and package substrates.

2. Is BT resin the same as BT epoxy?
No. BT epoxy generally refers to a BT resin system that has been modified or blended with epoxy to adjust processing, adhesion, toughness, or other material properties.

3. Is BT resin better than FR-4?
Not for every PCB. BT is most useful when thermal stability, dimensional control, moisture behavior, package warpage, or semiconductor-substrate requirements justify the additional material cost.

4. Is BT resin used for BGA substrates?
Yes. BT resin is widely associated with BGA, CSP, memory, SiP, and other organic semiconductor package substrates.

5. Does every BT laminate have the same Tg and Dk?
No. BT is a material family. Tg, Dk, Df, CTE, moisture absorption, and other values vary by formulation, reinforcement, resin content, and test method.

6. Is a BT substrate the same as an IC substrate?
A BT substrate is one type of organic IC package substrate. Other IC substrates can use ABF and additional material systems depending on package architecture and interconnect density.

Bismaleimide triazine should therefore be specified as a material system, not as a single fixed-property laminate. Resin formulation, epoxy modification, glass reinforcement, copper construction, thickness, and processing conditions all influence how the finished PCB or substrate performs.

For a PCB project requiring BT laminate or another specialty material, EBest Circuit can review the material grade, stackup, dielectric thickness, copper construction, impedance requirements, finished thickness, and manufacturing constraints before fabrication. Send your project files to sales@bestpcbs.com for DFM review.

HVLP Copper Foil for AI Server PCBs: M9, 52-Layer Designs & Signal Loss

September 17th, 2026

AI server PCB materials are entering another upgrade cycle. A September 16, 2026 industry report highlighted movement toward 52-layer PCB architectures and M9-class CCL as cloud providers continue expanding AI infrastructure. The change is not simply more copper layers; higher data rates are forcing designers to control dielectric loss, conductor loss, impedance consistency, and phase behavior together.

That is why HVLP copper foil is becoming more important. As resin and glass systems reduce dielectric loss, rough copper can consume a larger portion of the channel-loss budget. The practical question for PCB engineers is therefore no longer only “Which laminate grade should I use?” but also which copper profile is needed, on which layers, and how should that low roughness be preserved through fabrication?

HVLP copper foil for AI server PCBs with M9 materials and 52-layer high-speed design

Key Takeaways

HVLP copper foil is used to reduce conductor loss in high-speed PCB channels by lowering the surface profile at the copper-dielectric interface.
AI server PCBs are moving toward higher layer counts and lower-loss M9-class material systems, making copper roughness increasingly important alongside resin Df and glass construction.
HVLP describes copper surface profile, not copper thickness. An 18 μm or 35 μm foil can still be a low-profile copper construction.
A 52-layer PCB does not necessarily require HVLP on every layer. Long high-speed signal channels usually deserve the lowest-profile copper first.
HVLP3, HVLP4, and HVLP5 are not universal IPC roughness classes. Engineers should verify actual Rz/Rq, foil thickness, treatment side, peel strength, and insertion-loss data.
Very smooth copper creates a manufacturing trade-off: lower conductor loss must be balanced with sufficient copper-to-resin adhesion.
PCB processing also matters. Aggressive inner-layer pretreatment can increase roughness and reduce the signal-integrity advantage of the incoming HVLP foil.

Why Is HVLP Copper Foil Demand Rising in AI Server PCBs?

HVLP copper foil demand is rising because AI server boards are combining more PCB layers with faster, longer loss-sensitive channels. The current AI infrastructure cycle is pushing higher-layer-count architectures together with M9-class material upgrades.

Three changes are happening at the same time:

PCB layer counts are increasing.
SerDes data rates continue moving toward 112G and 224G-class links.
CCL systems are reducing dielectric loss, making conductor loss more visible.

The demand increase therefore comes from both more high-speed PCB material per server and a higher proportion of signal layers requiring smoother copper.

What Is HVLP Copper Foil?

HVLP copper foil is a very-low-profile copper construction designed to maintain a smoother copper-dielectric interface than conventional electrodeposited copper.

The exact terminology varies by supplier. Some suppliers describe HVLP as ultra-low-profile copper, while the industry also uses “hyper very low profile” informally. What matters electrically is the actual surface morphology and measured roughness rather than the name alone.

Typical parameters to review include:

Rz surface roughness
Ra, Rq, or Sq where specified
Treatment-side roughness
Foil thickness
Tensile strength
Elongation
Peel strength

Copper profile and copper thickness are different parameters. A smoother HVLP foil can still be supplied in common thicknesses such as 12, 18, or 35 μm.

HVLP copper foil smooth surface compared with rough standard copper foil

HVLP vs VLP vs RTF vs Standard Copper Foil: What Changes?

The main difference is the surface profile presented to the dielectric. Lower-profile foil reduces the microscopic path length seen by high-frequency surface current.

Copper Foil Type	Surface Character	Typical Design Direction
Standard ED	Relatively rough	General-purpose PCB
RTF	Reduced profile on functional side	Mid- to high-speed PCB
VLP	Low profile	High-speed digital / RF
HVLP	Very low profile	Very-high-speed low-loss channels
Advanced HVLP	Extremely low profile	112G/224G, AI server, mmWave-class applications

These categories should not be treated as fixed global roughness ranges. Supplier processes, treatment methods, and naming conventions differ. For design work, the grade name should therefore be followed by the actual roughness specification and measured electrical performance.

HVLP VLP RTF and standard ED copper foil surface roughness comparison

Why Does M9-Class CCL Still Need Smoother Copper Foil?

M9-class material reduces dielectric loss, but total channel loss also includes conductor loss. Improving only the resin and glass system does not eliminate loss caused by rough copper.

Material Element	Main Role
Low-loss resin	Reduces dielectric loss
Low-Dk / advanced glass	Improves dielectric behavior and dimensional control
HVLP copper foil	Reduces conductor and insertion loss
Complete low-loss CCL	Balances all three for the required channel target

At lower frequencies, dielectric loss may dominate enough that moderate copper roughness is acceptable. As signaling frequency rises, however, current becomes increasingly concentrated near the conductor surface.

That makes the microscopic copper profile part of the signal path. A very-low-Df resin paired with unnecessarily rough copper can therefore surrender part of the improvement gained from the dielectric system. M9 should be evaluated as a complete laminate system rather than as a resin grade alone.

M9-class CCL structure with low-loss resin advanced glass and HVLP copper foil

How Does Copper Roughness Increase Conductor and Insertion Loss?

At high frequency, current flows primarily near the copper surface because of skin effect. When that surface is rough, the current follows a more complex microscopic path and experiences higher effective resistance.

The practical effects can include:

Higher conductor loss
Higher insertion loss
Apparent changes in effective Dk
Additional phase variation
Greater channel-to-channel variation

Published test data has shown that copper profile alone can materially change insertion loss even when the dielectric material remains the same. The exact dB/in change depends on substrate, trace geometry, frequency, and foil construction, so loss figures should always be tied to the actual test vehicle.

Smooth copper versus rough copper showing lower and higher insertion loss

Why Do 52-Layer AI Server PCBs Increase HVLP Copper Foil Demand?

Higher layer counts increase HVLP demand through both a quantity effect and a material-mix effect.

Quantity effect

More copper foil
More CCL cores
More prepreg
More signal-layer area
More lamination materials

Mix effect

At the same time, more routing may move from conventional foil or older low-profile grades toward lower-profile constructions as channel loss budgets tighten.

However, a 52-layer PCB does not mean all 52 layers use HVLP copper foil. Ground planes, power planes, short control traces, and lower-speed auxiliary layers may use different copper constructions.

52-layer AI server PCB showing quantity effect and mix effect on HVLP copper foil demand

Which PCB Layers Actually Need HVLP Copper Foil?

HVLP should normally be prioritized according to channel-loss sensitivity rather than applied to every copper layer by default.

Typical candidates include:

Long SerDes routing
112G/224G-class channels
PCIe and other high-speed differential links
Switch and accelerator interconnects
Backplane or midplane routing
Loss-sensitive memory/network interfaces
High-frequency RF or mmWave layers where applicable

Layers that may not require the same profile include:

Power planes
Ground planes
Short GPIO routes
Low-speed management buses
Short local control connections

The actual choice depends on trace length, data rate, dielectric thickness, insertion-loss budget, and laminate system.

AI server PCB layer stack highlighting high-speed layers that should prioritize HVLP copper foil

HVLP3 vs HVLP4 vs HVLP5: How Should Engineers Interpret the Grades?

HVLP3, HVLP4, and HVLP5 generally indicate progressively smoother copper within a supplier’s product family, but these labels are not universal IPC roughness classifications.

When comparing grades, engineers should request:

Rz
Ra / Rq / Sq where available
Treatment-side roughness
Copper thickness
Treatment chemistry
Peel strength
Resin compatibility
Insertion-loss test data

A buyer should therefore avoid specifying only “HVLP4 required.” A better requirement links the foil grade to a named laminate construction, roughness target, and electrical loss objective.

What Manufacturing Challenges Come with HVLP Copper Foil?

The manufacturing challenge with HVLP is to keep the copper surface smooth enough for low loss while maintaining enough adhesion to survive lamination, thermal cycling, and assembly.

Important controls include:

Copper-to-resin bonding
Inner-layer pretreatment
Brown oxide or alternative oxide chemistry
Lamination pressure and temperature
Resin compatibility
Etching compensation
Peel strength
Impedance consistency
Layer registration
High-layer-count warpage

PCB processing can change the incoming copper surface. The relevant question is not only “Was HVLP purchased?” but also “What roughness remains at the finished signal interface after fabrication?”

HVLP copper foil manufacturing process and engineering specification checklist

How Should Engineers Specify and Verify HVLP Copper Foil?

An HVLP requirement should connect the material specification to the actual electrical channel requirement.

For quotation or stackup review, provide:

Target data rate
Operating or Nyquist frequency
PCB layer count
Laminate family
Copper foil supplier and grade, if mandatory
Copper thickness
Required Rz / Rq / Sq
Treatment side
Layers requiring HVLP
Impedance tolerance
Maximum insertion loss
Critical trace length
Peel-strength requirement
Thermal and reliability requirements

Verification may include:

Impedance coupons
TDR
Insertion-loss coupons
VNA / S-parameter testing
Material certificate or COC
Lot traceability

For very-high-speed projects, the laminate, glass style, copper foil, stackup geometry, and fabrication treatment should be qualified together rather than approved as independent specifications.

What Cost and Supply Risks Should Buyers Check for HVLP4 and HVLP5?

Higher-grade HVLP introduces both material-cost and supply-chain risk because qualification is more restrictive than for standard copper foil.

When selecting an HVLP copper foil supplier, compare the actual Rz/Rq limits, treatment method, laminate qualification, and measured channel-loss data rather than relying on the grade name alone.

Buyers should check:

Qualified copper-foil suppliers
Qualified CCL combinations
Minimum order quantities
Lead time
Alternative material approval
Lot-to-lot roughness control
Qualification quantities
Insertion-loss validation
Whether substitutions require customer approval

A lower-cost foil with the same “HVLP4” label should not automatically be treated as electrically or mechanically equivalent. The actual laminate system, surface treatment, roughness, adhesion, and measured channel loss still need qualification.

FAQ About HVLP Copper Foil

1. What does HVLP mean in copper foil?
HVLP refers to very-low-profile copper foil developed for lower conductor loss. Supplier terminology varies, so the actual Rz/Rq and product specification are more important than the acronym alone.

2. Is HVLP copper thinner than standard copper foil?
No. Copper thickness and copper surface profile are separate parameters. HVLP can be supplied in common foil thicknesses such as 12, 18, or 35 μm.

3. What is the difference between VLP and HVLP copper foil?
Both reduce copper surface roughness, but HVLP generally targets a lower surface profile and more demanding high-speed channels. Exact roughness limits depend on the supplier.

4. Does M9 CCL always use HVLP5 copper foil?
No. M9-class material systems vary by laminate supplier and application. The required copper profile depends on data rate, stackup, trace length, insertion-loss target, and qualified material construction.

5. Does every signal layer need HVLP copper foil?
No. HVLP is normally prioritized for the most loss-sensitive signal layers. Short low-speed routes and non-signal planes may use other copper constructions.

6. What roughness value should I specify for a high-speed PCB?
There is no universal Rz value for every high-speed design. The correct target should be derived from the channel-loss budget and verified against the actual foil, laminate, stackup, and fabrication process.

Planning a High-Speed PCB with HVLP Copper Foil?

HVLP selection is only one part of a high-speed material system. Laminate Dk/Df, glass style, copper profile, trace geometry, layer assignment, impedance, inner-layer treatment, and insertion-loss testing all need to work together.

EBest Circuit can review stackup requirements, impedance targets, copper thickness, laminate availability, HVLP requirements, and manufacturability before quotation. For advanced low-loss PCB projects, send your Gerber files, stackup, material requirement, target impedance, and loss specification to sales@bestpcbs.com for engineering review.

7628 Fiberglass Cloth for PCB: Specs, Uses, Limits & Cost Impact

September 17th, 2026

7628 fiberglass cloth is one of the heavier standard electronic glass fabrics used to reinforce FR-4 laminate and prepreg. It is not dedicated to one particular PCB category. Its main value is structural: compared with thinner glass styles such as 2116 or 1080, 7628 can establish a relatively thick dielectric section with fewer plies.

That makes 7628 especially relevant to conventional FR-4 boards where board thickness, mechanical rigidity, and larger layer-to-layer spacing matter more than extreme routing density. It may still appear in advanced multilayer boards, but high-speed, HDI, CAF-sensitive, and thin-dielectric regions often need closer material evaluation.

7628 fiberglass cloth for PCB stackups with copper foil prepreg and FR-4 core layers

Key Takeaways

7628 fiberglass cloth is a relatively thick, heavy plain-weave E-glass fabric commonly used in FR-4 laminate and prepreg constructions.
Dry 7628 cloth is typically about 0.17 mm thick and 206 g/m², while common resin-impregnated 7628 prepregs can be around 0.20–0.22 mm thick.
It is especially useful when a PCB stackup needs a larger dielectric thickness with fewer prepreg plies.
Conventional FR-4 double-sided boards, industrial multilayers, power boards, automotive control boards, and other moderate-density PCBs are common application areas.
Heavy use of 7628 is less attractive for ultra-thin HDI, very fine via pitch, high-CAF layouts, and high-speed differential routing sensitive to glass-weave effects.
7628 needs careful validation in lead-free and high-CAF designs, particularly where hole-wall spacing becomes tight.
A rise in 7628 fiberglass cloth price does not increase every PCB price by the same percentage; the impact depends on how much 7628-based laminate or prepreg the stackup actually uses.

What Is 7628 Fiberglass Cloth?

7628 fiberglass cloth is a relatively thick electronic-grade E-glass fabric woven in a plain pattern and widely used as reinforcement in FR-4 PCB laminates and prepregs.

The dry fabric itself consists of glass yarn rather than resin. A typical construction uses ECG75 yarn with a nominal 44 warp × 31 fill count per inch. The dry cloth weighs about 206 g/m² and measures about 0.17 mm thick.

In PCB manufacturing, this dry glass fabric is impregnated with epoxy or another resin system before it becomes part of a usable laminate or prepreg construction. Terms such as resin content, prepreg thickness, and cured dielectric thickness describe the resin-impregnated material, not the dry 7628 cloth by itself.

What Are the Typical Specifications of 7628 Fiberglass Cloth?

Typical 7628 parameters are relatively stable at the dry-glass level, while resin content and final prepreg thickness vary by laminate supplier and resin system.

Parameter	Typical Value
Glass type	E-glass
Weave	Plain weave
Dry cloth thickness	~0.17 mm
Fabric weight	~206 g/m²
Warp × fill count	~44 × 31/in
Typical yarn	ECG75 1/0
Typical prepreg resin content	~46–51% in common constructions
Typical prepreg thickness	~0.20–0.22 mm in common higher-RC constructions

Resin content should therefore be treated as a prepreg parameter, not a fixed property of 7628 fiberglass cloth.

7628 E-glass plain weave fiberglass cloth with dry cloth and prepreg thickness specifications

Where Is 7628 Used in a PCB Stackup?

7628 is normally used inside FR-4 cores or prepregs where the stackup needs a relatively large dielectric build between copper layers.

Typical positions include:

Between inner signal and plane layers
Between two power or ground planes
Inside thicker multilayer core constructions
In FR-4 laminate used for conventional double-sided PCBs
In multilayer stackups where one ply needs to add significant dielectric thickness

A simplified multilayer stackup might combine several glass styles rather than using 7628 everywhere. Thinner 1080 or 2116 prepreg may be placed close to dense signal layers, while 7628 is used deeper in the board where more separation is required.

In a 1.6 mm multilayer PCB, this mixed-glass approach can help the fabricator meet total thickness without stacking an excessive number of thin prepreg plies.

Multilayer PCB stackup using 7628 prepreg to create thicker dielectric sections

Which PCBs Commonly Use 7628 Fiberglass Cloth?

7628 is most relevant to conventional FR-4 PCBs that need relatively thick dielectric sections rather than extremely thin, high-density stackups.

Common applications include:

Standard double-sided FR-4 PCBs
4-layer and general multilayer industrial boards
Power supply boards
Appliance control boards
Automotive control electronics
LED and charging equipment
General communication control boards
Multilayer PCBs requiring larger inner-layer spacing
Designs where board rigidity and finished thickness matter

These applications often use moderate line widths, conventional through holes, and relatively generous dielectric spacing. 7628 is therefore less about the end product category and more about how the FR-4 stackup is built.

PCB applications that commonly use 7628 fiberglass cloth including FR-4 industrial power automotive and charger boards

Why Is 7628 Useful for Thick PCB Dielectric Layers?

The main advantage of 7628 is that one ply can create substantially more dielectric thickness than thinner glass styles.

Glass Style	Example Prepreg Thickness
1080	~0.079–0.089 mm
2116	~0.119–0.135 mm
7628	~0.201–0.221 mm

Using 7628 can help:

Build larger layer-to-layer spacing with fewer plies
Reach standard board thickness more efficiently
Increase mechanical stiffness
Simplify some conventional multilayer stackups
Reduce the need to stack several thin prepregs in one dielectric section

Dielectric build per ply comparison of 1080 2116 and 7628 PCB prepreg

Which PCBs Are Less Suited to Heavy Use of 7628?

7628 is usually not the first choice near the most density-sensitive or signal-sensitive structures in an advanced PCB.

Designs that may favor thinner or more uniform glass styles include:

Ultra-thin HDI boards
Any-layer HDI
Fine-pitch microvia structures
Mobile and wearable products requiring very thin dielectrics
Tight hole-to-hole or plane-to-hole spacing
112G/224G high-speed channels
Millimeter-wave circuits
Differential pairs with strict skew limits
Stackups with demanding impedance uniformity

The reason is not that 7628 is unusable in an advanced PCB. A complex board may still use it in less critical internal regions. The concern is heavy use around the most sensitive layers, where its thicker weave, larger glass bundles, and greater dielectric build can make routing density, resin distribution, CAF margin, and high-speed performance harder to control.

Ultra-thin HDI fine via pitch high-speed differential and thin mobile PCBs less suited to heavy use of 7628 fiberglass cloth

What CAF, Wet-Out and Delamination Risks Should Be Checked with 7628?

7628 requires careful validation in high-CAF, tight-hole-spacing, and high-temperature lead-free applications because its heavy glass weave is harder to fully wet with resin.

The main concerns are:

Incomplete resin wet-out at yarn intersections
Limited resin between tightly packed glass fibers
Weak resin-to-glass bonding
Measling
Crazing
Delamination
CAF formation under moisture and electrical bias

Lead-free assembly can add additional thermal stress because the PCB experiences higher process temperatures. The actual risk depends on resin system, hole geometry, process quality, moisture exposure, voltage gradient, and stackup design.

7628 fiberglass cloth cross-section showing resin wet-out tight hole spacing CAF risk and delamination check

How Does 7628 Affect High-Speed Signals and Fiber Weave Effect?

7628 has a relatively visible, coarse glass-weave structure, which can increase local dielectric variation around high-speed traces.

A PCB dielectric is not perfectly homogeneous. Glass-rich regions and resin-rich regions have different dielectric properties. When a trace passes over different portions of the weave, the effective local Dk can vary.

For a differential pair, possible effects include:

Differential skew
Phase-delay mismatch
Local impedance variation
Timing uncertainty
Greater sensitivity at very high data rates

This is one reason high-speed designs may use spread glass, mechanically spread glass, thinner glass styles, or other more uniform constructions around critical channels. 7628 can still exist elsewhere in the same multilayer board where high-speed skew sensitivity is lower.

PCB fiberglass styles and differential pair skew comparison from 7628 to spread glass

7628 vs 2116 vs 1080 vs 106: What Is the Difference?

The main difference between these PCB glass styles is their fabric thickness, yarn structure, resin capacity, and the dielectric thickness they help create after lamination.

Glass Style	General Character	Typical PCB Use
7628	Thick, heavy weave	Standard FR-4, thicker dielectric sections
2116	Medium thickness	General multilayer PCB
1080	Thin, higher resin proportion	Thin multilayer and HDI structures
106 / 1037	Very thin	HDI and thin dielectric layers
Spread Glass	More uniform fiber distribution	High-speed, low-skew designs

7628 is useful when the stackup needs thickness quickly, while 2116 provides a more moderate dielectric build. 1080 and 106-class fabrics are better suited to thinner layer spacing.

No single glass style is automatically better. A production stackup often combines several styles to balance total thickness, resin flow, impedance, mechanical strength, and manufacturing yield.

How Do 7628 Fiberglass Cloth Price Changes Affect PCB Cost?

A 7628 price increase does not translate into the same percentage increase for every PCB because glass cloth is only one part of the laminate, prepreg, and total PCB manufacturing cost.

The effect is more direct on products that use substantial amounts of conventional FR-4 and thick dielectric structures, including:

Industrial multilayer PCBs
Power supply boards
Automotive control boards
Appliance electronics
LED and charging products
Standard thick FR-4 assemblies

The final PCB cost also depends on the number of 7628 plies, board layer count, total FR-4 thickness, laminate and prepreg supplier, resin system, material inventory, panel utilization, and order volume.

Ultra-thin HDI or advanced high-speed boards may rely more heavily on other glass styles and specialized laminates, so their cost response to 7628 alone can be smaller.

How Should Engineers Decide Whether to Use 7628?

7628 is a good candidate when the PCB needs conventional FR-4 processing and relatively large dielectric thickness without excessive stackup complexity.

Consider 7628 when:

A larger dielectric build is required
Overall PCB thickness or stiffness matters
Routing density is moderate
Through-hole spacing is adequate
Severe differential-skew control is not required
The material has already been qualified by the fabricator

Consider thinner or more uniform glass constructions when:

Very thin dielectric layers are required
Microvia density is high
Hole spacing creates CAF concerns
High-speed differential skew is critical
Millimeter-wave routing is present
Impedance uniformity requires tighter material control

At EBest Circuit, glass style is reviewed together with resin content, finished dielectric thickness, copper weight, via geometry, impedance requirements, and PCB manufacturing capability during stackup and DFM review.

FAQ About 7628 Fiberglass Cloth

1. Is 7628 fiberglass cloth used in FR-4 PCB?
Yes. 7628 is a common E-glass reinforcement style used in FR-4 laminate and prepreg constructions.

2. How thick is 7628 fiberglass cloth?
Dry 7628 fabric is typically about 0.17 mm thick. A resin-impregnated 7628 prepreg may be around 0.20–0.22 mm, depending on resin content and material system.

3. Is 7628 thicker than 2116?
Yes. In common PCB prepreg constructions, 7628 produces significantly more dielectric thickness per ply than 2116.

4. Can 7628 be used in HDI PCB?
Yes, but it is usually not the preferred material for very thin HDI dielectric layers or fine-pitch microvia regions. It may still be used elsewhere in the same multilayer stackup.

5. Does 7628 increase CAF risk?
Not automatically. However, 7628 requires closer evaluation in high-CAF designs with tight hole spacing because its heavy weave is more difficult to fully wet with resin.

6. Does a rise in 7628 fiberglass cloth price increase all PCB prices?
No. The effect depends on how much 7628-based laminate or prepreg the PCB stackup uses, along with layer count, board thickness, resin system, supplier pricing, and order volume.

Need Help Reviewing a 7628-Based PCB Stackup?

Using 7628 is mainly a stackup decision. Its suitability depends on required dielectric thickness, via spacing, resin system, signal speed, total board thickness, and the location of critical routing layers.

EBest Circuit can review FR-4 stackups, prepreg selection, controlled impedance, via geometry, CAF-sensitive spacing, and manufacturing requirements before fabrication. For a new PCB project, send your Gerber files, stackup requirements, material specification, and target board thickness to sales@bestpcbs.com for DFM review.

Positive vs Negative Photoresist: What’s the Difference and Which Should You Use?

September 16th, 2026

Positive vs negative photoresist differs in what happens to the exposed coating during development. In a positive resist, the exposed area becomes soluble and is removed. In a negative resist, exposure hardens or crosslinks the material, so the exposed area remains.

That reversal changes mask polarity, but tone alone does not decide which resist will print the smallest feature or survive the next process. Choose by required line and space, film thickness, exposure system, substrate, developer, etching or plating chemistry, and stripping method.

Positive vs negative photoresist, coated wafer, photomask and PCB coupon at a photolithography workstation

What Are Positive and Negative Photoresists?

Positive and negative are imaging tones: they identify which part of a light-sensitive coating remains after development. The terms do not indicate electrical polarity, film color, or product quality.

In a positive photoresist, the developer removes the areas that received enough exposure. The unexposed coating stays on the substrate and protects the material below. This creates a resist image that follows the dark regions of the photomask.

In a negative photoresist, exposure makes the illuminated areas resistant to the developer. The unexposed coating is washed away, so the remaining resist follows the clear regions of the mask. That image may act as an etch barrier, a plating mold, a temporary process film, or a permanent microstructure, depending on the product.

How Do Positive and Negative Photoresists Work?

Both materials convert an optical image into a patterned coating, but exposure changes their solubility in opposite directions. The full imaging sequence is coat or laminate, expose through a mask or direct-imaging system, and develop.

Positive resist chemistry is formulated so that sufficient exposure makes the illuminated polymer easier for the specified developer to dissolve. Development therefore clears the exposed regions and leaves the unexposed film. The printed edge depends on how sharply the chemistry changes from insoluble to soluble across the exposure boundary.

Negative resist chemistry polymerizes, crosslinks, or otherwise hardens where it receives sufficient light. Development removes the unexposed regions and leaves the exposed network. Crosslink density affects sidewall shape, adhesion, chemical resistance, and how readily the film can be stripped later.

Exposure dose must match the resist thickness and light source. Too little energy may leave a positive resist incompletely cleared or a negative resist insufficiently crosslinked. Excess energy can widen or narrow the printed feature by moving the effective image boundary.

Positive vs Negative Photoresist: What Are the Main Differences?

The central difference is simple: exposed positive resist is removed, while exposed negative resist remains. This positive vs negative photoresist comparison shows how that reversal affects the image and the processes each tone commonly serves.

Property	Positive Resist	Negative Resist
Exposed area	Removed	Remains
Unexposed area	Remains	Removed
Image formation	Exposure opens the coating	Exposure hardens the coating
Fine features	Often favored for high-resolution thin-film imaging	Capable when the material and process are optimized
Film thickness	Common in thinner coatings	Widely available as thick liquid or dry film
Adhesion	Controlled by formulation and surface preparation	Often strong after crosslinking
Typical uses	Semiconductors, microfabrication, selected PCB processes	PCB dry film, pattern plating, tenting, thick microstructures
Stripping	Often easier with the specified remover	May require a stronger or tightly controlled strip process

How Does Photoresist Type Affect Mask Polarity?

The same clear mask area produces opposite developed results. A clear area lets light reach the resist; whether that location opens or stays protected depends on the resist tone.

Positive vs negative photoresist, glass photomask above positive and negative developed copper coupons

Positive resist: A clear mask area exposes the resist; the developer removes that coating and opens the substrate at the same location.
Negative resist: A clear mask area exposes and hardens the resist, so the substrate remains protected at the same location.

Start with the final surface that must be open for etching, plating, deposition, or another operation. Trace that area backward through development and exposure to determine whether it should be clear or opaque on the mask. If a process changes from positive to negative tone, the image logic normally has to be inverted; reusing the old artwork can reverse protected and open areas.

Which Photoresist Offers Better Resolution and Fine-Line Performance?

Positive photoresist is often associated with finer imaging, but resist tone does not set the minimum feature size by itself. A qualified negative material can outperform a poorly matched positive process, especially when the film, exposure tool, developer, and substrate preparation were developed as one system.

Positive resists can produce steep profiles because the exposed material dissolves rather than forming a crosslinked network that may swell during development. This behavior is useful in thin-film semiconductor and microfabrication processes. It does not mean every positive formulation is suitable for every wavelength, thickness, or substrate.

For an actual line-and-space target, compare these inputs:

Resist thickness: Thicker films are harder to expose uniformly through their depth and can reduce aspect-ratio margin.
Exposure wavelength and dose: The resist must absorb and react correctly at the tool’s wavelength, with enough latitude to hold the intended edge.
Imaging geometry: Mask contact, collimation, direct-imaging focus, registration, and scattered light alter the printed feature.
Development: Developer type, concentration, temperature, spray pressure, and dwell time affect clearing, swelling, and sidewall loss.
Substrate condition: Surface roughness, oxide, contamination, and adhesion treatment change both image integrity and downstream yield.

Use the supplier’s resolution data only when its test thickness, exposure method, and process conditions are comparable to yours. For PCB work, the finished copper line after etching or plating matters more than the resist image alone.

How Do Positive and Negative Photoresists Compare in Thickness, Adhesion, and Durability?

Negative resists are often selected when the patterned film must be thick, mechanically robust, or resistant to prolonged chemical processing. Exposure builds a crosslinked structure that can hold tall features, bridge holes in a tenting process, or remain intact during plating.

Positive resists are widely used as thinner liquid coatings where clean development and fine profile control are priorities. Their adhesion and chemical endurance still depend on the formulation, bake sequence, surface preparation, and downstream chemistry. A thin positive film may be entirely suitable for a short etch but poorly matched to a long plating cycle.

For thick films: Check whether the resist can be exposed through its full depth without a weak base or distorted sidewall.
For adhesion: Match the resist to copper, silicon, glass, ceramic, or the actual substrate, then verify cleaning and bake conditions.
For chemical durability: Compare the specified etchant, plating bath, cleaning steps, temperature, and dwell time with the material data.
For stripping: Confirm that the hardened image can be removed without attacking the plated metal, substrate, or permanent coating that must remain.

Where Are Positive and Negative Photoresists Commonly Used?

Positive resists are common in fine-pattern thin-film work, while negative resists are common where the image must be thick or durable.

Positive photoresist applications include semiconductor lithography, microfabrication, lift-off processes using a suitable profile, photomask production, presensitized prototype PCBs, and selected liquid-resist PCB processes. These applications often value clean feature definition and predictable removal of the exposed region.

Negative photoresist applications include PCB dry-film imaging, pattern plating, hole tenting, thick electroforming molds, MEMS structures, and permanent epoxy-based features such as those made with SU-8. These processes often need film strength, thickness, adhesion, or resistance to later chemistry.

The same application category can use either tone when materials and equipment differ. If the existing line already meets the finished feature and reliability target, changing tone means reworking the mask logic, developer, exposure window, and stripping route.

Which Photoresist Is Commonly Used in PCB Manufacturing?

Negative-working dry film is widely used for commercial PCB imaging because it laminates uniformly, can tent selected holes, and forms a durable image for etching or pattern plating. Direct imaging and phototool exposure can both be used when the film is designed for the relevant wavelength and process.

Positive vs negative photoresist, blue dry film laminated onto a copper PCB production panel

Positive photoresist also has a place in PCB production. Positive presensitized boards are familiar in prototype and educational work, and positive liquid resists may be used in specialized or established imaging lines. A shop may also use different resist systems for inner layers, outer-layer pattern plating, solder mask, or non-PCB microfabrication, so “PCB photoresist” is not one universal chemistry.

For a PCB order, the customer usually does not need to prescribe resist tone. The useful inputs are finished copper thickness, minimum line and space, annular-ring and registration requirements, via structure, plating build, and surface finish. The fabricator can then choose a qualified imaging route that meets the finished-board drawing.

How Do Etching and Plating Requirements Affect Photoresist Selection?

Etching and pattern plating load the resist in different ways, so the downstream operation can decide which product is suitable even when both tones can print the artwork.

For an etch resist, the film must adhere through cleaning and etchant exposure, protect the copper or substrate without pinholes, and preserve the intended edge as material is removed beside it. Film thickness, sidewall shape, etchant resistance, and stripping after etch all affect the finished line width.

For pattern plating, the developed openings act as a mold. The resist must tolerate the plating chemistry and current distribution, remain bonded during the cycle, and provide enough thickness for the plated build without excessive mushrooming over the resist edge. Hole tenting or selective openings may further favor a robust dry film.

Specify the finished feature and downstream chemistry first. Then compare resist compatibility, required thickness, opening profile, adhesion, maximum process time, and removal method. This prevents a material that images cleanly from failing later in the line.

How Should You Choose Between Positive and Negative Photoresist?

Choose the resist that can produce the required finished feature within your existing exposure, development, and downstream process. Tone is one input; the qualified material system is the decision.

Consider positive resist for a thin-film process that prioritizes fine feature definition, uses a compatible positive-tone mask, and already has controlled coating, exposure, development, and stripping conditions.
Consider negative resist when the process needs a thicker or tougher image, dry-film lamination, hole tenting, pattern plating, prolonged chemical resistance, or a permanent crosslinked structure.
Keep the existing qualified tone when it already meets the finished geometry and reliability requirement. Changing tone also changes mask logic, process chemistry, exposure latitude, and verification work.

Make the decision from measurable requirements: minimum line and space, resist thickness, substrate topography, exposure wavelength, available dose window, developer, etchant or plating bath, stripping limit, throughput, and defect tolerance. If two candidates remain, compare them on the actual substrate at the intended thickness and judge the developed image and finished feature, not the brochure category.

What Should You Check Before Selecting a Photoresist Material?

A tone choice becomes a usable material choice only when the product matches the equipment, substrate, chemistry, and finished feature. Check the following items on the current technical data sheet and process specification:

Tone and format: Positive or negative; liquid, electrodeposited, or dry film; temporary or permanent.
Coating thickness: Nominal and working range after coating, lamination, bake, exposure, and development.
Exposure compatibility: Supported wavelength, recommended dose range, photospeed, and the capability of the mask aligner or direct-imaging tool.
Development: Developer chemistry, concentration, temperature, time, rinse, and the observable clearing endpoint.
Thermal steps: Soft bake, post-exposure bake, hard bake, and allowable substrate temperature.
Substrate and adhesion: Approved surface materials, cleaning method, roughness, adhesion promoter, and topography limits.
Downstream resistance: Compatibility with the actual etchant, plating bath, cleaner, solvent, and process duration.
Stripping: Specified remover, temperature, time, residue risk, and compatibility with the finished metal or device.
Storage and handling: Shelf life, refrigeration or humidity limits, yellow-room requirements, and equilibration before use.

Before releasing a full wafer lot or PCB panel, expose and develop a representative coupon using the intended thickness, substrate, artwork, and equipment. Inspect clearing, feature width, sidewalls, adhesion, and the result after the relevant etch or plating step. Freeze the production settings only after the coupon meets the finished-feature requirement.

FAQs About Positive vs Negative Photoresist

Q1: Is positive or negative photoresist better?

A1: Neither tone is better for every process. Positive resist is often chosen for thin, fine-feature imaging; negative resist is often chosen for thicker, durable films. The correct material must match the exposure tool, substrate, developer, downstream chemistry, and finished geometry.

Q2: Which photoresist is better for fine features?

A2: Positive resist is common in high-resolution thin-film lithography, but a modern negative resist can also resolve fine features. Compare data and test results at the required thickness and wavelength rather than selecting by tone alone.

Q3: Is PCB dry film photoresist positive or negative?

A3: Most common PCB imaging dry films are negative-working: exposed areas polymerize and remain after development. Confirm the exact product because specialized materials may use a different chemistry.

Q4: Is SU-8 a positive or negative photoresist?

A4: Standard SU-8 is an epoxy-based negative photoresist. Exposed regions crosslink and remain, which makes the material useful for thick, high-aspect-ratio and permanent microstructures.

Q5: Do positive and negative photoresists use the same developer?

A5: Not necessarily. Developer chemistry is product-specific; some systems are aqueous, while others use organic solvents or proprietary formulations. Use the developer and concentration stated for the exact resist.

Q6: Do you need to invert the mask when changing photoresist type?

A6: Usually yes, if the final protected and open areas must remain the same. Positive and negative tones respond oppositely under the same clear mask area, so confirm the mask polarity with a small exposure before production.

Q7: Can negative photoresist achieve fine lines?

A7: Yes. Fine-line performance depends on the specific material, film thickness, exposure optics, dose, development, surface condition, and the following etch or plating process. Negative-working dry films are used for fine PCB imaging when the complete process is qualified.

Q8: Which photoresist is easier to strip?

A8: Positive resists are often easier to remove because they do not form the same heavily crosslinked network, but removal still depends on the formulation and bake history. Check that the specified stripper will not damage the substrate or plated metal.

Q9: Can positive photoresist be used for PCB manufacturing?

A9: Yes. Positive presensitized boards and selected liquid-resist processes are used in PCB prototyping and specialized production. Commercial volume fabrication commonly uses negative dry film, but equipment and qualified process capability decide the actual route.

Q10: Why is negative dry film common in PCB fabrication?

A10: It can be laminated at a controlled thickness and forms a strong image that suits tenting, etching, and pattern plating. It also integrates well with established phototool and direct-imaging lines.

Positive photoresist removes exposed regions during development, while negative photoresist retains them. That difference changes mask polarity, but it does not by itself determine resolution or manufacturability. Film thickness, exposure conditions, adhesion, downstream chemistry, and stripping requirements decide whether a specific material fits the process.

For PCB production, judge the imaging process by whether it can repeatedly achieve the required line width, spacing, copper thickness, plating structure, and finished-board tolerances. Send your Gerber files, stackup, copper weight, minimum line and space, quantity, target delivery date, and any plating or inspection requirements to sales@bestpcbs.com for a manufacturability review and quotation.

InP Substrate Guide: Types, Applications, Suppliers, Prices, and Supply Risks

September 7th, 2026

Indium phosphide is a key semiconductor material for optical communication, high-speed photonics, infrared detection, and selected RF devices. Demand has also grown with AI data-center infrastructure, where high-speed optical links increasingly rely on InP-based lasers, detectors, and photonic components.

For engineers and buyers, however, choosing an InP substrate is not simply a matter of ordering a 2-inch or 4-inch wafer. Conductivity type, dopant, crystal quality, EPD, orientation, surface condition, and supplier consistency can all affect epitaxial growth and device yield. This guide explains the main types, applications, available sizes, material alternatives, pricing factors, suppliers, and current supply risks.

InP substrate wafers in a semiconductor photonics laboratory

What Is an Indium Phosphide (InP) Substrate?

An InP substrate is a single-crystal wafer made from indium phosphide, a III-V compound semiconductor consisting of indium and phosphorus.

It is mainly used as the crystalline foundation on which additional semiconductor layers are grown. Materials such as InGaAs, InGaAsP, and InAlAs can be deposited on InP to form active device structures for lasers, photodetectors, modulators, HBTs, HEMTs, and photonic integrated circuits.

The terms InP wafer and InP substrate are often used interchangeably, but the manufacturing context matters:

Bare InP substrate: A polished single-crystal wafer before epitaxial growth.
Epi-ready InP substrate: A polished and cleaned wafer prepared for MOCVD or MBE epitaxy.
InP epiwafer: An InP substrate with one or more epitaxial semiconductor layers already grown on it.

This distinction matters in sourcing. A company that grows bulk InP crystals and supplies polished substrates is providing a different product from an epitaxy supplier offering a completed device layer structure.

What Is an InP Substrate Used For?

InP substrates are mainly used where the device requires long-wavelength photonics, high-speed optical conversion, infrared detection, or very high-frequency electronic performance.

InP substrate applications including optical transceivers, laser diodes, photodetectors, photonic ICs, and RF devices

Typical applications include:

Optical transceivers for telecom networks and data centers
DFB and FP laser diodes
Electro-absorption modulated lasers
PIN photodiodes and avalanche photodiodes
Photonic integrated circuits
Optical modulators and amplifiers
Short-wave infrared detectors
LiDAR and optical sensing
HBT and HEMT devices
Millimeter-wave electronics

One of InP’s strongest application areas is optical communication around 1310 nm and 1550 nm. The substrate supports III-V epitaxial systems such as InGaAsP and InAlGaAs that can be engineered for these telecom wavelength bands.

This makes InP particularly useful in laser sources, detectors, and integrated photonic devices used in high-speed optical links. Silicon photonics may handle routing and passive functions in the same module, but active light generation and detection often still rely on III-V materials.

What Types of InP Substrates Are Available?

InP substrates are usually classified by conductivity type and dopant.

Undoped, n-type, p-type, and semi-insulating InP substrate types

InP Substrate Type	Common Dopant	Electrical Behavior	Typical Use
Undoped InP	None	Usually lightly conductive	Epitaxy, research, special structures
n-Type InP	S or Sn	Electron-conducting	Lasers, detectors, optoelectronics
p-Type InP	Zn	Hole-conducting	Selected device structures
Semi-insulating InP	Fe	Very high resistivity	RF, HBT, HEMT and isolated device structures

Semi-insulating InP substrate is especially important for high-frequency electronics. Its high resistivity helps limit unwanted current paths through the substrate and improves isolation between active areas.

Specifying only “n-type” or “semi-insulating” is not enough for production purchasing. The RFQ should also define the required:

Carrier concentration
Resistivity
Mobility, where relevant
Dopant type
Electrical tolerance range

Two wafers sold under the same general category can still have substantially different electrical characteristics.

What Sizes Are InP Substrates Available In?

Commercial InP substrates are commonly available in 2-inch, 3-inch, and 4-inch diameters, while 6-inch InP is becoming more important for higher-volume manufacturing.

Comparison of 2-inch, 3-inch, 4-inch, and 6-inch InP substrate wafer sizes

Nominal Size	Diameter	Typical Use
2 inch	50.8 mm	R&D, legacy production, specialty devices
3 inch	76.2 mm	Established compound-semiconductor production
4 inch	100 mm	Common modern production platform
6 inch	150 mm	Higher-volume and newer manufacturing platforms

Availability varies by supplier. A manufacturer that routinely ships 3- or 4-inch material may not have qualified 6-inch capacity.

Larger wafers can improve production economics because more dies are processed in one batch, but scaling InP crystal growth is difficult. Maintaining low EPD, good flatness, uniform electrical properties, and acceptable yield becomes harder as crystal diameter increases.

For that reason, a 6-inch requirement should be discussed with suppliers early. Do not assume it will have the same lead time, grade availability, or supplier base as 4-inch material.

InP vs GaAs vs Silicon: When Should You Use Each Substrate?

InP is not the best substrate for every semiconductor device. It becomes attractive when its material system provides a performance advantage that is difficult to reproduce with GaAs or silicon.

Selection Factor	InP	GaAs	Silicon
1310/1550 nm photonics	Excellent	Limited	Strong passive platform
Native light generation	Excellent	Excellent in suitable wavelengths	Poor
High-frequency electronics	Excellent	Excellent	Good
Photonic integration	Strong	Application-dependent	Very strong ecosystem
Large wafer availability	Limited	Better than InP	Excellent
Material cost	High	High	Low
Manufacturing scale	Specialized	Mature III-V	Extremely mature

Use InP when the device architecture depends on:

InGaAs-based photodetection
Long-wavelength semiconductor lasers
High-speed InP HBTs
Integrated III-V photonics
Epitaxial structures lattice-matched to InP

GaAs is often more suitable for VCSELs, RF amplifiers, LEDs, and some sensing systems. Silicon remains the preferred choice when low cost, large wafer size, CMOS compatibility, and mature manufacturing are more important than native III-V optical performance.

The material choice should therefore start with device physics rather than wafer price.

How Much Does an InP Substrate Cost?

InP substrate prices vary widely, so there is no reliable single market price.

InP substrate supply and price drivers including wafer diameter, dopant, EPD, supplier capacity, and AI optical demand

Small research-grade wafers may cost hundreds of dollars, while larger production-grade, low-defect, or epi-ready wafers can reach four-figure prices per wafer. During supply shortages, pricing can rise well beyond normal levels.

An InP substrate price quote should therefore be compared against the complete wafer specification and supply terms. The main price drivers include:

Wafer diameter
Conductivity type
Dopant
EPD requirement
Crystal quality
SSP or DSP polishing
Epi-ready finishing
Orientation tolerance
Flatness requirements
Inspection level
Quantity
Supplier capacity

A quotation issued during a shortage may also reflect capacity allocation rather than normal manufacturing cost.

When comparing InP substrate suppliers, send the same specification to each company. Otherwise, a lower price may simply correspond to a higher EPD, wider geometric tolerance, different polishing grade, or less demanding inspection criteria.

Why Are InP Substrates in Short Supply?

The current shortage is largely the result of fast-growing optical demand meeting a relatively concentrated substrate manufacturing base.

Several factors are involved:

AI data-center growth: Faster optical interconnects require more lasers, detectors, and optical transceiver components.
Limited crystal-growth capacity: High-quality InP single-crystal production is difficult to scale quickly.
Supplier concentration: Only a limited number of companies can manufacture qualified production-grade material at volume.
Long qualification cycles: Switching substrate suppliers can require new epitaxy, wafer-fab, reliability, and customer validation.
6-inch transition: Larger-diameter production requires new crystal-growth capability and downstream qualification.
Trade restrictions: Export controls and geographic concentration can create regional availability problems.
Capacity reservation: Large device manufacturers increasingly secure substrate volumes through long-term agreements.

For procurement teams managing InP substrate shortages, the useful response is not simply buying excess inventory. Our overview of critical semiconductor supply-chain materials provides additional context for qualification and continuity planning. Better controls include:

Qualifying a second source
Providing suppliers with realistic demand forecasts
Identifying acceptable alternative grades
Tracking lead-time changes
Reserving capacity for production programs
Requalifying material changes before volume release

Main InP Substrate Companies Globally

The global InP supply chain includes bulk crystal growers, polished substrate manufacturers, epitaxy companies, device fabs, and distributors. They should not be treated as the same type of supplier.

Several established InP substrate companies with documented substrate capabilities include:

Company	Region	InP Capability	Buyer Should Confirm
Sumitomo Electric	Japan	Semi-insulating and conductive InP substrates	Diameter, grade and available capacity
JX Advanced Metals	Japan	Multiple diameters and dopant options	EPD, flatness and capacity allocation
AXT	USA / global manufacturing	Multiple wafer sizes including large-diameter InP	Origin, qualification and availability
Freiberger Compound Materials	Germany	Semiconducting and semi-insulating InP	EPD grade, polish and orientation
IQE / Wafer Technology	UK / USA	InP substrate and epi-ready wafer capability	Bare substrate vs epitaxial scope

This is not a ranking.

A well-known company may still be unsuitable for a specific program if it cannot support the required diameter, dopant, EPD, surface condition, monthly volume, or qualification history.

Buyers should also establish what the company actually controls:

Bulk crystal growth
Wafer slicing
Grinding and polishing
Epi-ready surface preparation
Epitaxial growth
Distribution only

That distinction becomes important when investigating yield problems or controlling future process changes.

How Should You Choose an InP Substrate Supplier?

Start with the released wafer specification rather than the supplier’s standard product catalog.

Checklist for choosing an InP substrate supplier based on diameter, dopant, resistivity, EPD, surface condition, and lead time

A useful RFQ should include three groups of information.

Material requirements

Diameter and thickness
Crystal orientation
Off-cut, if required
Conductivity type
Dopant
Carrier concentration or resistivity
Maximum EPD

Geometry and surface requirements

TTV
Bow
Warp
SSP or DSP
Surface roughness
Epi-ready requirement
Flat or notch
Particle and contamination limits

Quality and supply requirements

Certificate of analysis
Lot traceability
Electrical test data
EPD data
Packaging method
Standard lead time
Monthly capacity
MOQ
Change-notification policy

For production programs, also confirm how the supplier handles changes to crystal-growth equipment, polishing processes, raw materials, manufacturing locations, or inspection methods.

The lowest wafer price is not always the lowest program cost. Stable epitaxy yield, lot-to-lot consistency, controlled changes, and predictable delivery can be more valuable than a small difference in substrate price.

InP Substrate FAQs

1. What does semi-insulating InP mean?

Semi-insulating InP is engineered to have very high electrical resistivity rather than behaving like a normal conductive n-type or p-type semiconductor substrate. Fe compensation is commonly used. The high-resistivity substrate helps isolate active device regions and reduce parasitic electrical paths, making it useful for HBTs, HEMTs, RF devices, and selected integrated circuits.

2. What dopants are commonly used in InP substrates?

Common InP dopants include sulfur and tin for n-type material, zinc for p-type material, and iron for semi-insulating material. Undoped material is also available. The exact dopant should be specified together with the required carrier concentration or resistivity rather than by dopant name alone.

3. What is an epi-ready InP substrate?

An epi-ready InP substrate has been polished, cleaned, inspected, and packaged so its surface is suitable for epitaxial growth. Important controls may include surface roughness, particles, haze, contamination, orientation, and flatness. Epi-ready should still be defined against the supplier’s specification because the term does not establish one universal surface limit.

4. Why is InP more expensive than silicon?

InP is more expensive because crystal growth is more difficult, usable crystal diameter is smaller, material volume is much lower, defect control is more demanding, and the manufacturing ecosystem is far less scaled than silicon. Silicon benefits from enormous 200 mm and 300 mm production infrastructure that InP does not have.

5. How is InP substrate quality measured?

No single measurement defines InP quality. Typical controls include EPD, resistivity or carrier concentration, mobility, crystal orientation, TTV, bow, warp, surface roughness, particle count, contamination, and visual defects. Which parameter deserves the tightest limit depends on the intended epitaxial structure and device process.

6. Can InP substrates be replaced by GaAs?

Sometimes, but not as a direct drop-in replacement. GaAs can replace InP only when the required device structure, wavelength, lattice-matched epitaxial system, and electrical performance can be redesigned around GaAs. For many 1310/1550 nm lasers, InGaAs detectors, and InP-based high-speed photonic devices, changing to GaAs would require a different epitaxial and device architecture rather than simply changing the substrate.

InP substrates provide capabilities that are difficult to reproduce with silicon or GaAs in specific high-speed photonic and electronic applications, but those advantages come with higher material cost, tighter supplier capacity and more demanding qualification requirements. Before purchasing, define the substrate by its diameter, conductivity, dopant, electrical range, EPD, orientation and surface condition, then compare suppliers on both technical consistency and supply continuity.

If your InP-based optical, RF, or semiconductor device is moving into PCB or PCBA integration, EBest Circuit can review the board-level manufacturing requirements, controlled-impedance interfaces, assembly constraints, and production data. Send your Gerber files, BOM, drawings, and project requirements to sales@bestpcbs.com for engineering review and quotation.

Electronic Glass Cloth Price Increase 2026: PCB Cost and Lead-Time Impact

September 2nd, 2026

electronic glass cloth moved from a background laminate input to a visible PCB supply-chain issue in 2026. A June supplier notice reported increases of 30% for E-glass cloth and 15% for FLD2 cloth, while an August 28 notice reproduced by industry media reported a 20% adjustment for thin-cloth prepreg below 7628, versus 10% for FR-4 and the notice’s 7628-and-above prepreg group.

These figures do not mean every PCB quotation rises by the same percentage. They show where material pressure is building. The effect on a finished board depends on the laminate system, glass style, resin content, layer count, panel utilization, supplier stock, yield, order quantity, and required delivery date.

Electronic glass cloth used in FR-4 laminate, prepreg, and multilayer PCB manufacturing

What Is Electronic Glass Cloth in a PCB?

Electronic-grade woven glass fiber fabric is made from fine glass yarn woven into a controlled cloth. Laminate manufacturers combine it with epoxy, polyimide, or another resin system to make rigid cores and prepreg. In an FR-4 construction, the woven reinforcement contributes electrical insulation, dimensional stability, heat resistance, and mechanical strength.

Several terms appear in specifications and searches. They overlap, but they are not always interchangeable:

Electronic glass cloth and electronic-grade glass fiber cloth identify the electronic-material application.
Woven glass fabric and glass fiber cloth describe the textile form more broadly.
Electronic glass fabric is a natural industry variation of the same product category.
The search phrase e glass cloth normally refers to E-glass composition, not every electronic glass material. Low-Dk or low-CTE specialty glass may use a different composition.

Searches such as glass cloth pcb, glass fabric pcb, and fiberglass cloth pcb usually point to this same reinforcement layer inside a copper-clad laminate or prepreg construction. For a broader material overview, see what copper-clad laminate is in a PCB.

Copper foil, prepreg, FR-4 core, and woven glass cloth used in PCB materials

Why Did Electronic Glass Cloth Prices Rise in 2026?

The reported increases were not caused by one isolated factor. Supplier and industry reports point to a combination of glass-yarn cost, energy, transportation, specialized capacity, and demand from AI servers, high-speed switches, semiconductor packages, and other advanced electronics.

The market is also segmented. Standard E-glass, low-Dk glass, low-CTE glass, spread glass, and ultra-thin glass cloth do not share the same production route or availability. A price change for one family must not be presented as a universal increase for every electronic glass product.

What Do the 2026 Supplier Notices Say?

Date	Material Scope	Reported Adjustment	Application Basis
July 1, 2026	FULLTECH E-glass glass fiber cloth	+30%	New orders placed on or after the effective date
July 1, 2026	FULLTECH FLD2 glass fiber cloth	+15%	New orders placed on or after the effective date
August 28, 2026	FR-4, all thicknesses in the reproduced notice	+10%	New orders accepted under the notice
August 28, 2026	PP, 7628 and the notice’s thicker-cloth group	+10%	New orders accepted under the notice
August 28, 2026	PP, the notice’s thin-cloth group below 7628	+20%	New orders accepted under the notice

The August data comes from a supplier letter reproduced by financial and metals-industry media. Buyers should confirm the exact brand, grade, region, currency, order date, and open-PO treatment with their material source. Our separate Kingboard FR-4 and prepreg update explains that notice in more detail.

Reported August 2026 prepreg price adjustments for glass cloth below 7628 and 7628 or above

How Does Glass Cloth Cost Move Through the PCB Supply Chain?

The price signal passes through several commercial and manufacturing stages before it reaches a finished PCB. A glass-yarn producer supplies yarn to a weaving and treatment operation. The resulting electronic cloth is sold to a laminate manufacturer, which impregnates it with resin to make prepreg or combines it with copper foil to make CCL. A PCB factory then consumes specific core and prepreg constructions during lamination.

Pressure can change at each stage:

Glass yarn and weaving: fine-yarn availability, energy, yield, and specialist capacity affect cloth supply.
Laminate production: cloth, resin, copper foil, treatment, and coating costs are combined into a material grade.
PCB fabrication: the board’s panel area, layer count, bond plies, lamination cycles, and scrap allowance determine how much material is consumed.
Customer quotation: stock position, volume, quote validity, test scope, and delivery priority determine the final commercial effect.

This chain also explains why two suppliers may quote different changes for the same Gerber package. One may hold qualified inventory bought before the notice, while another may need to purchase new material immediately. Freight, minimum-order quantities, allocation rules, and the remaining shelf life of prepreg can also change the usable cost basis. The comparison is meaningful only when both quotations use the same stack-up, laminate series, glass construction, copper weights, acceptance criteria, quantity, and delivery basis.

Why Is Thin Glass Cloth Under More Pressure?

Thin glass cloth is not merely a lighter version of 7628. Fine yarn, weaving control, fiber opening or spreading, surface treatment, uniform resin impregnation, and thickness tolerance all influence its suitability for electronic laminates. These requirements can limit interchangeable supply.

IPC glass-style numbers such as 106, 1080, 2116, and 7628 identify different constructions. In general, thinner styles support thinner dielectric openings, while 7628 is a heavier cloth. However, the final pressed thickness and electrical behavior still depend on resin content, ply count, resin system, and the laminate manufacturer’s construction. The August notice’s “below 7628” classification is a commercial grouping in that notice, not a complete engineering rule for every supplier.

Which PCB Types May Feel the Impact First?

Boards that use more specialized, thinner, or tightly controlled dielectric constructions are more exposed to availability and substitution risk:

HDI PCB: thin dielectric build-up layers and microvia reliability depend on a controlled material system.
High-layer-count PCB: many bond plies amplify the effect of prepreg availability, press planning, and material qualification.
Thin PCB: the overall thickness budget leaves less room to replace one glass style with a thicker construction.
High-speed PCB: Dk, Df, resin content, glass weave, and trace geometry must remain aligned with the impedance and loss model.

Not every board in these categories uses the same cloth. For example, a high-speed design may require low-Dk glass rather than standard E-glass. A high-speed PCB design therefore needs material review before any cost-driven stack-up change.

HDI, high-layer-count, thin, and high-speed PCB types affected by glass cloth availability

Does a 20% PP Increase Mean a 20% PCB Price Increase?

No. The reported percentage applies to a material category under a supplier notice. A finished PCB quotation includes many other inputs and operations. The actual effect varies with:

board area, panel utilization, layer count, and bond-ply count;
laminate brand, material family, glass style, resin content, and copper weight;
drilling, lamination cycles, plating, surface finish, testing, and expected yield;
supplier inventory, order quantity, quote validity, and requested lead time.

A small standard double-sided FR-4 board and a 24-layer controlled-impedance board will not absorb the same material-cost change. The more useful question is which line items and stack-up layers changed, not whether one headline percentage can be copied into the finished-board price.

Can a Cheaper Glass Style Be Substituted Safely?

Only after engineering review. Two constructions with similar nominal thickness can have different resin content, Dk, Df, local weave behavior, copper geometry, and lamination performance. A substitution can change impedance, insertion loss, skew, CAF risk, drill behavior, and reliability.

Before approving an alternative, compare at least:

laminate and prepreg manufacturer, series, and approved glass style;
nominal and pressed dielectric thickness, resin content, and ply count;
Dk and Df at the relevant frequency and test method;
Tg, Td, CTE, moisture performance, and CAF requirements;
controlled-impedance geometry and simulation or coupon acceptance criteria.

This is especially important for fine-feature designs. Our UHDI printed circuit board guide shows why material and stack-up decisions must follow the actual geometry and reliability target.

How Can PCB Buyers Reduce Cost and Lead-Time Risk?

Procurement and engineering teams can act before a shortage becomes a schedule problem:

Freeze the electrical and mechanical stack-up early enough for material confirmation.
Separate mandatory material properties from brand preferences that may allow an approved equivalent.
Share realistic prototype and production forecasts so uncommon glass styles can be planned.
Ask whether the quotation is based on current inventory, a new material purchase, or an allocation.
Keep quote validity, open-PO treatment, and delivery assumptions in writing.
Never approve a high-speed or HDI substitution from a price table alone.

FAQ About Electronic Glass Cloth

Is electronic glass cloth the same as fiberglass?

It is a fiberglass textile made for electronic-material use, but the electronic-grade designation adds controls for yarn, weave, thickness, treatment, and performance. General-purpose fiberglass fabric should not be treated as PCB laminate reinforcement.

Is all PCB glass cloth E-glass?

No. E-glass is common, but low-Dk, low-CTE, and other specialty glass compositions are also used. The required material depends on the laminate family and electrical or mechanical target.

Why does glass style matter to impedance?

Glass style changes the resin-to-glass ratio and local dielectric distribution. Together with pressed thickness and copper geometry, those changes affect the impedance and loss model.

Should buyers reserve thin prepreg earlier?

For HDI, high-layer-count, thin, or high-speed designs, early confirmation is sensible when the stack-up relies on a specific glass style or laminate series. The need depends on actual supplier stock and order timing.

How Can EBest Circuit Support Your PCB Material Review?

At EBest Circuit, we review PCB fabrication requirements together with the stack-up, material system, copper weights, impedance targets, quantity, and delivery plan. If a preferred material is under price or supply pressure, we can identify which requirements are fixed and which alternatives still need technical approval.

For a project affected by electronic glass cloth availability, send your Gerber files, stack-up, material brand or grade, board thickness, copper weights, impedance requirements, order quantity, and target delivery date to sales@bestpcbs.com. We will review the material basis before confirming a quotation or proposing a substitution.

Kingboard Price Increase: FR-4 and Prepreg Costs Rise in August 2026

August 31st, 2026

The latest Kingboard price increase concerns the materials used to manufacture PCBs, not an automatic increase in every finished-board quotation. An August 28, 2026 notice reproduced by financial media reports higher FR-4 and prepreg prices for newly accepted orders. For purchasing teams, the next step is to identify the material used in each board and confirm which commercial terms apply.

At EBest Circuit, we help customers review PCB material requirements alongside fabrication needs. This update explains the reported changes, where they enter a multilayer board’s material bill, and what to clarify when a supplier sends a revised quotation.

Kingboard price increase illustrated with copper-clad laminate and prepreg materials

What Changed in the August 28 Notice?

Gelonghui’s August 28 report, carried by Sina Finance, reproduces a notice from Guangdong Kingboard Laminates Trading Co., Ltd. The stated adjustments are:

Material category in the notice	Reported increase
FR-4, all thicknesses	10%
Prepreg: 7628 and the notice’s thicker-cloth category	10%
Prepreg: the notice’s thin-cloth category below 7628	20%

The reproduced letter is dated August 28. We checked its wording against the report, but it was obtained through a media publication, not a direct supplier communication. Confirm the applicable grade and price with your material supplier before changing a purchase order.

When Does the New Pricing Apply?

The notice refers to new orders accepted from its issue date. It does not establish how every distributor will handle existing inventory, previously accepted orders, or an earlier quotation that remains valid.

Before approving a revised board price, ask for three specific confirmations:

Order status: Was the material order already accepted, or does the job still require a new purchase?
Quotation basis: Which material grade, copper weight, sheet size, quantity, currency, and tax basis are being compared?
Validity: How long does the revised quotation remain open, and what event fixes the price?

A finished-PCB purchase order and a laminate manufacturer’s order are different transactions. Do not assume that sending a board PO earlier automatically secures an earlier material price; obtain written confirmation from the party supplying your boards.

Why Are Glass Cloth and Copper Foil Important?

The letter cites rising prices and tighter supply of glass cloth and copper foil. Both are inputs to PCB laminate production; neither is simply an optional accessory that can be removed from a drawing.

A copper-clad laminate combines a dielectric base with copper foil. Prepreg supplies resin-bearing reinforcement between layers during lamination. Their costs enter the material bill through different purchased items and constructions.

The notice alone does not tell us how much either input has risen across the entire market, how long supply pressure will last, or which next adjustment will follow. Those would require separate dated evidence. For a current order, the relevant information is the supplier’s quotation for the exact material being purchased.

PCB Prepreg vs Core: Which Material Is Affected?

The distinction in PCB prepreg vs core matters because a multilayer stackup uses cured laminate and bonding sheets differently. A core is already cured; prepreg starts as resin-impregnated reinforcement that bonds the assembly during pressing.

Cured copper-clad core compared with uncoppered prepreg bonding material

For background on the bonding stage, see our explanation of prepreg in PCB manufacturing. For this price review, identify the actual core and prepreg entries in the approved stackup rather than treating the entire board as a single sheet of FR-4.

When comparing prepreg PCB material, retain the manufacturer’s grade, resin system, glass style, resin content, and number of plies. Two options described simply as “FR-4 prepreg” may not have the same electrical properties or processing behavior. A purchasing description that omits these details can hide a construction change inside an apparently cheaper quotation.

Why Does Prepreg PCB Thickness Need a Construction Check?

Prepreg PCB thickness is not determined by a glass-style number alone. Resin content, the selected construction, and the pressed assembly all matter. Manufacturer data can list more than one thickness or resin-content option for the same glass style.

The notice’s wording around 7628 is a supplier pricing category. It should not be converted into a universal rule that every glass-style code with a smaller numerical value is physically thinner. Match each ordered prepreg item to the supplier’s classification.

Construction also affects PCB prepreg dielectric constant. Isola’s laminate-manufacturing guide explains that glass construction and retained resin content influence dielectric properties. Its material data illustrate why an apparently similar glass designation is not enough to prove equivalence; those Isola values should not be copied into a Kingboard design.

For an impedance-controlled board, changing dielectric spacing or material properties can require a new impedance calculation and an approved stackup revision. Keep the electrical requirement fixed while evaluating the material choice.

Does a 20% Prepreg Increase Mean a 20% PCB Price Increase?

No. A percentage applied to one purchased material does not automatically apply to the total selling price of a finished PCB. The board also includes other materials, fabrication operations, inspection, testing, handling, and commercial terms.

PCB cost categories showing materials, fabrication, testing, and handling without assigning cost shares

A useful calculation starts with the affected material lines, not the total board invoice: multiply each old material-line cost by its applicable adjustment, then add the differences. That estimates the change in those lines only, assuming the same specification, quantity, and purchasing basis.

It still does not determine the final commercial quotation. Inventory purchased at an earlier price, panel utilization, production volume, and other cost changes may affect the outcome. Our copper-clad laminate price guide provides broader background on material-price factors.

If a revised quotation cites the Kingboard price increase, ask which material lines changed and whether the board specification stayed the same. A traceable explanation is more useful than applying a headline percentage to every item.

Which Cost-Saving Changes Need Engineering Approval?

Start with options that preserve the approved design, such as reviewing order quantities or panel utilization with the fabricator. Material substitutions require a separate technical decision; a lower material price does not establish that the replacement will work.

Engineering review of material grade, layer stackup, and copper weight before a PCB substitution

Changing prepreg construction: Review finished dielectric spacing, resin availability around copper features, and electrical requirements.
Changing laminate grade: Compare the relevant thermal and electrical properties and any material restrictions on the drawing.
Reducing copper: Recheck current handling, thermal behavior, and fabrication requirements rather than treating copper weight as a purchasing-only choice.
Changing a qualified build: Agree on required samples, inspection, and customer approval before production release.

Keep the existing approved construction if equivalence has not been demonstrated or the customer does not permit substitutions. Requalification time and scrap risk can outweigh a small purchase-price saving.

How Can We Help You Review a Material-Cost Change?

At EBest Circuit, we provide PCB fabrication and PCBA services with technical support for material and build requirements. We can review your approved stackup and discuss which material choices are fixed, which alternatives may be evaluated, and what information is needed for a current quotation.

Send your Gerber files, stackup, specified laminate grade, copper weight, order quantity, and required delivery date to sales@bestpcbs.com. If you are comparing a revised quote, include the earlier specification and quote date so we can compare the same build. Any proposed material change should be documented and approved before manufacturing.

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How Should Engineers Specify and Verify HVLP Copper Foil?

What Cost and Supply Risks Should Buyers Check for HVLP4 and HVLP5?

FAQ About HVLP Copper Foil

Planning a High-Speed PCB with HVLP Copper Foil?

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Key Takeaways

What Is 7628 Fiberglass Cloth?

What Are the Typical Specifications of 7628 Fiberglass Cloth?

Where Is 7628 Used in a PCB Stackup?

Which PCBs Commonly Use 7628 Fiberglass Cloth?

Why Is 7628 Useful for Thick PCB Dielectric Layers?

Which PCBs Are Less Suited to Heavy Use of 7628?

What CAF, Wet-Out and Delamination Risks Should Be Checked with 7628?

How Does 7628 Affect High-Speed Signals and Fiber Weave Effect?

7628 vs 2116 vs 1080 vs 106: What Is the Difference?

How Do 7628 Fiberglass Cloth Price Changes Affect PCB Cost?

How Should Engineers Decide Whether to Use 7628?

FAQ About 7628 Fiberglass Cloth

Need Help Reviewing a 7628-Based PCB Stackup?

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What Are Positive and Negative Photoresists?