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What Is a Solder Blow Hole? Causes and Prevention in Solder Joints
Thursday, October 8th, 2026

A solder blow hole is a surface opening left when gas escapes through molten or partly solidified solder, most often in a plated through-hole (PTH) joint after wave soldering or selective soldering. The gas may come from PCB moisture, damaged hole-wall plating, trapped flux, or blocked venting, while an unsuitable thermal profile can make any of these problems worse. This guide shows how to recognize the defect, trace it to the PCB or soldering process, judge its reliability risk, and prevent it without relying on guesswork or repeated touch-up.

Solder blow hole on a plated through-hole solder joint

What Is a Solder Blow Hole?

A solder blow hole is a gas-created cavity that opens at the surface of a solder joint. Heat turns moisture, trapped air, flux solvent, or contamination into gas. If that gas enters the PTH while the solder is liquid, it can push through the fillet and leave a crater as the joint solidifies.

A blow hole is not the same as every solder void. A void can remain fully enclosed, while a blow hole has a visible surface opening. Incomplete vertical fill is also a separate condition. When the cavity cannot be seen clearly, use X-ray or a cross-section before deciding what is inside the joint.

What Does a Blow Hole Look Like in a Solder Joint?

Look for a round or irregular crater in the solder fillet, often with a dark center whose bottom is not visible. It commonly appears beside a through-hole lead on the solder side, even when the surrounding solder looks properly wetted.

Macro comparison of a solder blow hole and an intact through-hole solder joint
  • Opening: A crater or pin-sized hole in the fillet, not an unfilled annular area.
  • Location: Beside the lead, near the barrel wall, or at the fillet edge.
  • Pattern: Repeated on one component, hole family, board area, or PCB lot.
  • Related signs: Solder splash, incomplete fill, laminate damage, lifted lands, or poor wetting.

A photograph confirms the surface feature, not its depth. Map where the openings occur, then use the pattern and internal inspection to choose the first root-cause check.

What Causes Blow Holes in Solder Joints?

A blow hole needs three things: a gas source, a path into the joint, and molten solder. Common sources and paths include:

  • PCB moisture: Absorbed water becomes steam during soldering.
  • PTH defects: Resin cavities, debris, pinholes, cracks, or uneven copper trap gas or open a route through the barrel wall.
  • Flux or contamination: Excess flux, unevaporated solvent, or residual chemistry releases gas at wave contact.
  • Blocked venting: A low component body, collar, tight lead fit, or mask intrusion closes the easier top-side exit.
  • Thermal imbalance: Poor preheat leaves moisture or solvent in the hole; excessive heat can stress weak plating.
  • Joint geometry: Hole clearance, board thickness, copper planes, and component orientation affect heating, fill, and gas escape.

The defect pattern narrows the cause. A single PCB lot or repeated hole location points toward board construction; a defect that starts after one recipe change across several lots points toward the assembly process.

Why Are Through-Hole Solder Joints More Prone to Blow Holes?

A PTH joint traps gas more easily because the lead, copper barrel, laminate, flux, and rising solder share a narrow vertical space. As solder climbs the annular gap, it can seal the solder-side opening. If a low-mounted component also covers the top, expanding gas may be forced back through the liquid solder.

Cutaway showing gas escaping through molten solder in a plated through-hole joint

PTHs also place copper and laminate together under rapid heating. Weak adhesion, drilling damage, or discontinuous plating can open a gas path as the materials expand. Check component seating, lead-to-hole clearance, top-side venting, and barrel condition before changing the soldering recipe.

How Does PCB Moisture and Outgassing Lead to Blow Holes?

Moisture causes a blow hole when it becomes vapor faster than it can escape safely. Water absorbed during storage or handling can pressurize the heated PTH region and travel through a plating defect into molten solder. Residual fabrication chemistry, contamination, and trapped flux solvent can produce the same effect.

  • Compare properly stored and exposed boards from the same PCB lot.
  • Run one material-approved drying trial without changing components, flux, or the soldering recipe.
  • If defects remain, inspect barrel plating, resin cavities, and trapped process chemistry.

A lower defect rate after drying supports moisture as a contributor, but it does not prove the barrel is sound. Avoid arbitrary bake conditions that may damage solderability, labels, components, or laminate materials.

Which Wave Soldering Conditions Can Increase Blow Hole Formation?

Wave soldering conditions increase risk when moisture or flux volatiles reach the wave before they are removed, or when heating and solder contact trap gas inside the PTH.

  • Insufficient or uneven preheat: Cool areas retain moisture or solvent and may fill poorly.
  • Excess or uneven flux: Liquid left in the hole releases gas during wave contact.
  • Incorrect speed, angle, or contact time: These settings change heat transfer, hole fill, and venting time.
  • Unbalanced solder temperature: Too little heat can weaken fill; too much can stress the laminate and barrel.
  • Uneven thermal mass: Ground planes, thick boards, heavy copper, and large connectors create local cold spots.
  • Top-side obstruction: Low-seated parts can seal the vent path.

Measure the affected joint with thermocouples, change one variable within the qualified window, and recheck fill, wetting, bridging, and component temperature. If the same verified change corrects several PCB lots, the process hypothesis becomes stronger.

How Can PCB Hole Design and Plating Affect Blow Hole Risk?

Hole geometry controls solder flow and venting; barrel quality controls whether gas can enter through the hole wall.

  • Finished-hole clearance: Too little restricts flux, solder rise, and venting; too much can weaken capillary fill. Compare the lead maximum with the finished-hole tolerance, not the drill size.
  • Barrel integrity: Rough drilling, smear, resin cavities, thin copper, pinholes, cracks, or poor adhesion can store gas and create an escape path.
  • Component seating: A body, shoulder, or collar against the top pad can cap the hole. Verify the intended standoff.
  • Thermal connections: Heavy planes can keep one hole cooler. Review thermal relief, copper balance, and solder access.

Review the finished-hole drawing, lead tolerance, seating detail, and a representative microsection together. If dimensions are in tolerance but the same barrel location keeps failing, investigate drilling and plating before adding heat or widening the hole.

Do Solder Blow Holes Affect Solder Joint Reliability?

A blow hole can affect reliability, but the surface opening alone does not show how serious it is. A shallow crater may leave adequate wetted area. A deeper cavity can reduce mechanical area, hide incomplete fill, or indicate a plating defect that grows under thermal cycling.

Base the disposition on:

  • cavity depth and connection to the barrel;
  • vertical fill and circumferential wetting;
  • lead, land, and plating condition;
  • mechanical, electrical, vibration, and thermal demands; and
  • the governing standard, drawing, product class, and customer criteria.

Continuity at room temperature does not prove mechanical integrity. Quarantine the affected population and decide whether to accept, rework, or reject only after the internal evidence and acceptance criteria agree.

How Should Solder Blow Holes Be Inspected and Evaluated?

Start with a defect map, then choose solder joint inspection methods that answer the remaining internal questions.

  1. Inspect both sides: Record the designator, opening location, component, PCB lot, and defect frequency.
  2. Check the complete joint: Review wetting, vertical fill, lead protrusion, land condition, splash, bridging, and laminate damage.
  3. Use angled X-ray when needed: Oblique or 2.5D views can reveal PTH fill and voiding that a surface image cannot, although overlapping features may limit simple 2D X-ray.
  4. Cross-section representative samples: A microsection can show cracks, plating continuity, resin cavities, separation, and the connection between the crater and an internal void.
  5. Correlate records: Compare storage history, PCB lots, flux application, measured profiles, wave settings, and defect locations.
  6. Apply the agreed criteria: Record the current standard revision, product class, drawing requirements, customer specification, and disposition.

A complete inspection record contains the affected population, evidence of the joint’s internal condition, and a disposition tied to the governing criteria.

How Can You Tell Whether the Blow Hole Comes From the PCB or the Soldering Process?

Use repeated patterns and controlled comparisons; one photograph cannot assign the cause.

Comparison of PCB microsection evidence and wave-solder process investigation
  • One PCB lot or the same hole location fails: Suspect laminate, drilling, plating, local contamination, or design. Compare bare-board coupons, microsections, and supplier lot records.
  • Several PCB lots fail after one recipe change: Suspect preheat, flux, conveyor, wave settings, or handling. Compare measured profiles and machine records from before and after the change.
  • Only low-seated components fail: Suspect blocked top-side venting. Check standoff, collars, shoulders, orientation, and hole clearance.
  • Controlled drying helps but does not eliminate the defect: Moisture contributes, but a structural gas path may remain. Inspect the barrel and resin for cavities or cracks.
  • Defects follow heavy copper or cool zones: Suspect local thermal imbalance. Profile an affected joint and a known-good joint on the same board.

Hold the PCB lot, component lot, flux, and recipe constant except for the factor being tested. Use defect-rate changes to narrow the hypothesis, then confirm the gas path with X-ray or a representative cross-section.

How Can You Prevent Solder Blow Holes Before and During Assembly?

Prevent blow holes by controlling the PCB barrel, moisture exposure, venting, and soldering window before production begins.

  1. Define geometry and acceptance: Lock finished-hole and lead tolerances, board thickness, component seating, venting, solder access, and governing criteria.
  2. Control bare-board quality: Qualify drilling, desmear, cleaning, and plating; use coupons or microsections where the risk justifies them.
  3. Protect stored boards: Follow approved packaging, storage, and exposure limits. Dry boards only with a documented, material-compatible procedure.
  4. Qualify flux, preheat, and wave together: Verify flux coverage and solvent removal with a measured board profile, then set the wave parameters inside the approved process window.
  5. Trend production: Map defects by PCB lot, component, hole family, and recipe before the issue becomes a large rework population.
  6. Verify the corrective action: Compare controlled groups and confirm the next build with inspection or cross-section evidence when required.

The corrective action should remove the gas source, close abnormal paths into the barrel, or restore a safe venting and soldering window. If the defect returns, reopen the root-cause investigation instead of making touch-up routine.

FAQs About Solder Blow Holes

Q1: Does a switch from HASL to ENIG prove that the surface finish caused the blow holes?

A1: No. The change may coincide with different storage, hole geometry, wetting, or supplier processing. Compare controlled lots and inspect the barrel before assigning the cause to ENIG.

Q2: Can raising a low-seated LED or connector reduce recurring blow holes?

A2: Yes, if the body or collar seals the top of the PTH. Use an approved standoff change, then verify mechanical stability, lead length, and solder fill.

Q3: Will nitrogen eliminate solder blow holes?

A3: Not by itself. Nitrogen may improve wetting and reduce oxidation, but it cannot remove moisture, repair porous plating, evaporate excess flux, or open a blocked vent.

Q4: Why can blow holes cluster on ground pins while nearby signal pins remain normal?

A4: Ground pins often connect to more copper and heat more slowly. Compare thermal profiles and thermal-relief geometry at affected and normal pins.

Q5: Should suspect joints be touched up before failure analysis?

A5: Keep representative joints untouched. Rework can alter the crater, drive off volatiles, add flux, or damage the land and barrel. Photograph and map samples first.

Q6: Which records should be frozen when the defect is first found?

A6: Preserve PCB and component lots, storage history, flux and alloy batches, machine recipe, measured profile, defect map, two-sided images, and any X-ray or microsection results.

In short, a blow hole is the symptom; the right correction depends on whether the evidence points to PTH structure, moisture or venting, or the soldering process.

For a recurring defect or a new PTH design, send EBest Circuit your Gerber or ODB++ data, stackup, hole and lead dimensions, defect map, PCB lot history, and thermal profile at sales@bestpcbs.com for an engineering review and PCB/PCBA quotation.

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What Is SSOP Package? Dimensions, PCB Footprint, Soldering, and Applications
Thursday, October 1st, 2026

An SSOP package, or Shrink Small Outline Package, is a surface-mount IC package with gull-wing leads on two sides. It gives designers a compact, leaded package whose solder joints remain visible around the body.

SSOP is a package family, not one fixed mechanical outline. Two parts described as SSOP may use different body widths, lead spans, pitches, heights, and PCB land patterns, so the exact package code and manufacturer’s drawing must guide footprint design and assembly.

SSOP package, elongated fine-pitch IC mounted on a complete PCB module at an electronics inspection bench

What Is SSOP Package?

SSOP stands for Shrink Small Outline Package, a compact surface-mount IC package with gull-wing leads arranged along two opposite sides. Compared with a standard SOIC of similar pin count, an SSOP generally uses a narrower body and finer lead spacing, reducing PCB area while keeping the solder joints exposed for optical inspection and rework.

SSOP describes a package family rather than one interchangeable outline. Confirm the exact manufacturer’s package code and drawing before choosing a PCB footprint because body width, lead pitch, overall span, height, and land-pattern requirements can differ. The practical tradeoff is greater board density with less assembly margin, so stencil design, placement accuracy, and solder-bridge control need closer attention.

What Are the Standard SSOP Package Dimensions?

There is no single set of SSOP package dimensions for every device. The same SSOP label covers multiple JEDEC outlines, body widths, heights, lead counts, and pitches. Use the package code on the exact component datasheet before selecting or creating a footprint.

The examples below from the NXP SSOP package index show how dimensions can vary within one manufacturer’s package family. The body column reports package length × body width × the height value listed by NXP, which may be nominal or maximum depending on the outline.

Package Example Pitch Body (mm)
SSOP16, SOT338-1 0.65 mm 6.2 × 5.3 × 2.0
SSOP20, SOT339-1 0.65 mm 7.2 × 5.3 × 2.0
SSOP24, SOT340-1 0.65 mm 8.2 × 5.3 × 2.0
SSOP28, SOT341-1 0.65 mm 10.2 × 5.3 × 2.0
SSOP16, SOT519-1 0.635 mm 4.9 × 3.9 × 1.73
SSOP48, SOT370-1 0.635 mm 15.9 × 7.5 × 2.8

These examples explain why SSOP-16 package dimensions or SSOP-20 package dimensions cannot be inferred from pin count alone. A 16-pin SSOP package can belong to a 5.3 mm-wide, 0.65 mm family or a 3.9 mm-wide, 0.635 mm family. Likewise, an SSOP-28 package should be checked by its package drawing rather than by an unqualified library name.

What Lead Pitch Does an SSOP Package Use?

A 0.65 mm lead pitch is common, but it is not universal. Official manufacturer package libraries also list 0.635 mm and 0.64 mm SSOP families, so the pitch must come from the exact package drawing or orderable-part datasheet.

Pitch is the center-to-center distance between adjacent leads. It controls pad spacing, solder-mask geometry, routing escape, stencil behavior, placement tolerance, and the optical resolution needed to detect bridges. Do not assume that a 0.65 mm footprint is compatible with a 0.635 mm package because the difference looks small; the offset accumulates across the lead row.

Confirm the pitch together with body width, lead count, overall lead span, lead width, lead length, and package height. Use that complete set of dimensions, not the pitch alone, to choose or build the PCB land pattern.

How Should You Design an SSOP PCB Footprint?

Build or select the footprint from the exact package code and its recommended land pattern. Component lead dimensions describe the part; they are not the same as the PCB pad dimensions needed to solder it.

  1. Confirm the exact package code: Start with the manufacturer’s part number, package suffix, pin count, and drawing code. A library name such as “SSOP-20” is not specific enough on its own.
  2. Check pitch and lead geometry: Read the specified pitch and the dimensional limits for lead width and length, body width and length, overall lead span, standoff, and coplanarity. A nominal body size alone does not show where every lead can land.
  3. Use the recommended land pattern: Prefer the component manufacturer’s current recommendation when one is available. For example, TI’s DB0028A drawing shows 0.45 × 1.85 mm lands on 0.65 mm pitch for that specific 28-lead outline, not for every SSOP-28 package.
  4. Check solder mask and paste openings: Confirm that the fabricator can hold the intended mask web and that stencil apertures suit the paste and assembly process. Excess paste can increase bridging, while too little paste can produce opens or weak joints.
  5. Verify pin 1 and component orientation: Align the footprint marker, silkscreen, courtyard, centroid rotation, and assembly drawing. Leave enough access around both lead rows for optical inspection and rework.

Never assume that two SSOP devices with the same pin count can share a footprint. Compare the complete drawing and recommended land pattern before reusing a library part.

What Is the Difference Between SOIC and SSOP Packages?

SSOP is usually the better choice when board area is tight, while SOIC generally offers more assembly and rework margin. The table compares the points that most often affect package selection; exact dimensions and performance still depend on the orderable device and its package drawing.

What Users Care About SOIC SSOP
PCB area Usually needs more board area for a similar lead count Usually uses less board area for a similar lead count
Common lead pitch Often 1.27 mm Often 0.65, 0.635, or 0.64 mm
Assembly margin Wider lead spacing gives more print and placement margin Tighter spacing needs closer stencil, placement, and reflow control
Prototyping and hand soldering Generally easier to place and solder manually Feasible with suitable tools, magnification, and operator control
Inspection and rework Exposed leads are easier to see and access Exposed leads remain visible, but tighter spacing makes bridges and rework more demanding
Footprint compatibility Not interchangeable with SSOP without checking the exact drawing and land pattern Needs its own checked land pattern rather than an assumed SOIC footprint

SOIC is often easier to prototype, inspect, and rework when board area is available. SSOP is useful when density matters and the assembly process can control the finer pitch. Neither is a drop-in substitute for the other, even when the pin count and electrical function appear to match. The SOIC package guide provides additional SOIC-specific detail.

What Is the Difference Between SSOP and TSSOP Packages?

TSSOP is a thinner small-outline package family and is often more compact than a comparable SSOP, but the names alone do not prove footprint compatibility. In TI’s 20-pin package comparison, the DB SSOP has a 2.00 mm maximum height, while the PW TSSOP has a 1.20 mm maximum and occupies less footprint area. That example illustrates the family difference; it does not define every SSOP or TSSOP.

Pitch is not a reliable shortcut because both families contain multiple outlines. NXP listings, for example, include TSSOP packages at 0.65 mm and 0.5 mm pitch, while its SSOP listings include 0.65 mm and 0.635 mm examples. Before changing packages, compare pitch, body width and length, lead span, lead dimensions, height, pinout, and the recommended land pattern from the exact device drawings.

The same pin count or device family does not make an SSOP and TSSOP mechanically interchangeable. Treat a package change as a PCB footprint check, not as a name-based substitution.

Where Are SSOP Packages Commonly Used?

SSOP packages are common where a dual-row leaded IC must fit into limited board space while keeping its joints optically accessible. The package appears across many device classes; it is not tied to a single circuit function.

  • Logic and I/O: Buffers, latches, bus-interface devices, and I/O expanders are often offered in this compact leaded format.
  • Data conversion: ADCs, DACs, and mixed-signal ICs may use SSOP when the layout needs moderate pin density and visible leads.
  • Interfaces and communications: Transceivers, line drivers, and serial-interface devices are common candidates when routing space is limited but optical inspection still matters.
  • Analog and control: Op-amps, sensor interfaces, controllers, and clock devices are available in SSOP options when their pin count and thermal needs fit the outline.
  • Compact equipment: Industrial controls, consumer electronics, audio/video products, and communication hardware use SSOP when the smaller mounting area justifies the finer-pitch assembly process.

In practice, the exact device and mechanical outline should drive the decision. An application label by itself is not a reason to choose SSOP.

What Should You Consider When Selecting an SSOP Package?

Select the electrical device first, then verify that its exact SSOP option fits the board, assembly process, inspection plan, and supply strategy. Package size cannot compensate for an incorrect function, rating, or lifecycle choice.

  • Does the IC meet the electrical requirement? Confirm function, pinout, ratings, speed, accuracy, interfaces, temperature range, and any thermal limits for the real board conditions.
  • Does the exact outline fit the available PCB space? Check the package suffix, lead count, body size, lead span, height, courtyard, and routing access rather than comparing body width alone.
  • Can the PCB and SMT process handle the pitch? Match the pad, mask, stencil, placement, and reflow requirements to the fabricator and assembler’s capabilities.
  • Can the package be inspected and reworked? Allow optical access to both lead rows and enough surrounding space for the planned inspection and rework tools.
  • Will the exact package remain available? Check the component’s lifecycle, authorized supply options, and qualified alternatives early enough to avoid a late footprint change.

How Is an SSOP Package Soldered to a PCB?

Production SSOP assembly normally uses solder-paste printing, pick-and-place, controlled reflow, and inspection. Fine lead spacing makes print volume and lead-to-pad alignment more sensitive than they are for a wider-pitch package, but there is no universal SSOP temperature profile.

  1. Print the solder paste: Align the stencil apertures with the pads and control deposit volume. Too much paste raises bridge risk; missing or incomplete deposits raise open-joint risk.
  2. Place the component: Match pin 1 and align both lead rows with their pads. A placement offset can push one row toward bridging while leaving too little overlap on the other.
  3. Reflow the assembly: Set the profile from the solder alloy and paste guidance, PCB thermal mass, and the component’s temperature limit. Board construction and nearby components change heating behavior, so a package name cannot supply one universal profile.
  4. Inspect the joints: After reflow, check the exposed gull-wing leads for bridging, opens, misalignment, lifted leads, and poor wetting, then use electrical testing where product risk and test access justify it.

Footprint dimensions, package and board tolerances, placement accuracy, flatness, solder paste, and stencil behavior work together. A correct package drawing cannot compensate for the wrong land pattern or a shifted paste print.

What Assembly Problems Can Occur With SSOP Packages?

The most common SSOP assembly problems are bridges, opens, misalignment, lifted leads, poor wetting, and orientation errors. Start with what is visible, then check the process condition most likely to have produced it.

Observation Likely Cause First Check
Solder bridge Excess or shifted paste, placement offset, pad or mask mismatch Paste deposits, stencil apertures, placement image, and pad spacing
Open or low-solder joint Missing paste, poor transfer, bent lead, coplanarity error, or weak wetting Paste deposit, lead plane, pad finish, profile, and visible wetting
Component skew Unequal deposits, placement error, or asymmetric reflow forces Pad symmetry, deposit balance, and pre-reflow placement
Lifted lead Lead damage, poor coplanarity, handling stress, or pad-height variation Incoming lead condition, seating plane, board flatness, and local joint gap
Poor wetting Oxidation, contamination, unsuitable profile, or expired/incorrect material Lead and pad finish, paste condition, cleanliness, and reflow profile
Wrong orientation Ambiguous marking or inconsistent library, CPL, feeder, and drawing data Pin 1 on the part, footprint, placement data, and AOI model

Do not repair the symptom before confirming the cause. Removing a bridge may restore continuity on one board, but a shifted stencil or incorrect footprint can repeat the same defect across the lot.

How Should SSOP Solder Joints Be Inspected?

Inspect SSOP joints with visual or automated optical methods first because the gull-wing leads and fillets are exposed. Judge the joints against the applicable product requirement and assembly standard rather than a generic online photograph.

  • Confirm identity and orientation: Verify the part marking, package suffix, pin 1, polarity where applicable, and seating position before judging individual joints.
  • Inspect the lead rows: Check lead-to-pad alignment, unintended connections, insufficient solder, lifted or damaged leads, visible wetting, and consistent fillet formation at the toe and heel regions that can be seen.
  • Use AOI for repeatable coverage: Program the correct package geometry and joint criteria. AOI can compare every visible lead quickly, but lighting, library setup, board contrast, and obstructions affect its results.
  • Apply X-ray only when justified: X-ray is not automatically required for an ordinary exposed-lead SSOP joint. Use it when a hidden feature, overlapping structure, adjacent bottom-terminated device, or failure investigation cannot be resolved optically.
  • Add electrical testing where needed: Continuity, shorts, in-circuit, or functional testing can reveal failures that appearance alone cannot prove. Electrical testing complements solder-joint inspection; it does not replace it.

IPC-A-610 is widely used for electronic-assembly acceptance, but the applicable revision and class must come from the product or customer requirement. Do not infer pass limits from a photograph.

FAQs About SSOP Packaging

Q1: What do codes such as DB and DBQ mean on an SSOP listing?

A1: They are manufacturer-specific package designators, not interchangeable names for one outline. For example, two SSOP codes can indicate different body widths or lead pitches. Match the code on the orderable part number to the drawing in the same datasheet.

Q2: Can an SSOP IC plug directly into a solderless breadboard?

A2: No. SSOP is a surface-mount package, and its fine lead spacing does not match a standard 2.54 mm breadboard grid. For prototyping, solder the IC to a suitable SSOP-to-DIP adapter or use a purpose-built carrier board.

Q3: What should you check before buying an SSOP-to-DIP adapter?

A3: Match the adapter to the exact pin count, lead pitch, body width, lead span, pad layout, and pin 1 orientation. A board labeled only “SSOP-16” may not fit every 16-lead SSOP outline.

Q4: Does the SSOP name guarantee RoHS compliance?

A4: No. SSOP describes the package family, not the terminal finish or environmental status. Check the exact orderable part number, material declaration, and applicable compliance documentation.

Q5: How should moisture-sensitive SSOP parts be stored before reflow?

A5: Follow the moisture-sensitivity label and the component manufacturer’s handling instructions. Keep unopened parts in their specified moisture-barrier packaging. After opening the bag, observe the stated floor life and use controlled dry storage or baking only when the product instructions and applicable J-STD-033 requirements call for it.

Conclusion

The safest SSOP design starts with the exact orderable part, not a generic library name. Before PCB layout, confirm its pitch, body dimensions, lead geometry, package code, and recommended land pattern. That work gives printing, placement, soldering, and inspection a sound starting point.

If your PCB uses SSOP or another fine-pitch SMT package, send the part number, datasheet, PCB files, BOM, quantity, and assembly requirements to sales@bestpcbs.com for review and quotation.

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Solder Joint Inspection Guide: Methods, Criteria and Checklist
Thursday, July 23rd, 2026

Solder joint inspection verifies whether each connection meets the specified workmanship and product-class requirements. A defensible plan combines documented criteria with visual inspection, SPI, AOI, X-ray and electrical testing. The goal is controlled, traceable evidence that the assembly meets its requirements, not a cosmetically perfect board.

Solder Joint Inspection at a professional PCBA quality workstation

What Is PCB Solder Joint Inspection and Why Is It Important?

PCB solder joint inspection examines paste deposits, formed joints and process evidence against defined criteria. A neat joint can still contain insufficient solder, poor wetting or a hidden void. A matte lead-free joint may be fully acceptable.

Effective inspection catches defects before they become field failures. It also provides objective evidence for lot acceptance, corrective action and traceability. Before production, define the assembly standard, product class, package risks and inspection stages. Assign clear authority for accepting, rejecting or escalating nonconforming results.

What Does a Good Solder Joint Look Like and Which Defects Should Be Rejected?

A good solder joint has the wetting, solder quantity, alignment and geometry required for its specific termination. There is no universal shape or shine.

Inspect the lead, land and solder together. Apply the criteria for that termination and product class. Surface finish, alloy and process affect appearance. Gloss alone does not prove solder joint integrity.

Inspection Characteristic Acceptable Evidence Nonconforming or Review Condition Engineering Significance
Wetting Solder visibly wets the required land and termination surfaces Nonwetting, dewetting or exposed areas beyond the applicable limit Poor wetting can reduce mechanical and electrical integrity
Solder quantity Enough solder to form the required connection without obscuring critical evidence Insufficient or excessive solder, or solder balls outside the applicable acceptance limits Both too little and too much solder can hide or create failure risks
Joint geometry Termination position and fillet dimensions satisfy the applicable criteria Lifted lead, severe misalignment, open joint, bridging, disturbed shape or inadequate clearance Geometry affects contact, electrical clearance and load transfer
Surface condition Surface is consistent with the alloy and process, without damaging cracks or contamination Cracks, foreign material, overheating or exposed metal outside the applicable criteria Surface anomalies can indicate process damage or reduced durability
Hidden structure X-ray or other evidence shows acceptable hidden-joint formation where required Suspected opens, bridging, head-in-pillow indicators, displaced solder or voiding beyond the agreed limit Bottom-terminated packages cannot be fully judged from the board surface

Do not create a local reject rule from a photograph alone. Confirm the termination type and use the specified magnification and lighting. Record the acceptance clause or approved customer criterion behind the decision.

What Solder Joint Inspection Criteria, Standards and Requirements Apply?

A solder joint should be accepted only against a documented requirement. The inspection plan must name the applicable standard, revision and product class. It should also identify the assembly drawing, customer additions, approved deviations and the order of precedence when requirements differ.

IPC J-STD-001 defines how soldered electrical and electronic assemblies are produced and controlled. It covers materials, process requirements and minimum end-product expectations. IPC-A-610 provides the visual acceptability criteria used to judge the completed assembly. These documents are normally applied together, but the purchase order or drawing must state the required revisions and whether Class 1, 2 or 3 applies.

Package-specific guidance helps engineers select suitable inspection evidence. IPC-7095 addresses BGA implementation, while IPC-7093 covers bottom-termination components such as QFNs. These documents support design, process and inspection planning. They do not replace the acceptance criteria specified by contract.

The acceptance check must match the joint geometry and what can actually be observed. Visible SMT joints are evaluated for alignment, wetting, solder quantity, bridging, disturbed solder and terminal damage. Through-hole joints also require checks of source- and destination-side wetting, barrel fill, lead protrusion and damage to the land, barrel or laminate.

Hidden joints require an inspection method that can produce the missing evidence. For BGA, QFN and LGA terminations, define the X-ray system, viewing angle, coverage and measurement method before inspection. The plan should explain how opens, bridges, void patterns, head-in-pillow indications and uncertain results will be reviewed or escalated.

Product-specific limits must be written into the acceptance plan. Do not apply one universal void percentage, fillet shape or solder-coverage limit to every package. Define the measured area, calculation method and local concentration rule, then relate each limit to the thermal, electrical or reliability risk it controls.

Every acceptance decision needs traceable evidence. Record the board or lot identity, reference designator, defect classification and supporting image or measurement. Also retain the governing requirement, inspection equipment or program revision, disposition, rework status and reinspection result.

How Do You Choose the Right Solder Joint Inspection Method?

Choose solder joint inspection methods by visibility, package geometry, process stage and escape consequence. No single method covers every defect. Map each credible failure mode to the least complex repeatable method.

Method Primary Application Detectable Conditions Primary Limitation
Human visual inspection Accessible joints, first articles, low-volume builds and rework verification Bridges, alignment, wetting and contamination Operator-dependent; no hidden-joint view
SPI Paste control before reflow Volume, area, height and offset Does not inspect the completed joint
AOI High-throughput visible inspection Presence, polarity, placement and bridges Occlusion restricts coverage
X-ray Hidden or complex solder structures Open-joint signatures, bridges, voids and alignment Does not prove electrical function
Electrical testing Connectivity and functional behavior Opens, shorts and circuit failures Can pass a mechanically weak joint
Cross-section Internal-structure validation and failure analysis Joint geometry, internal interfaces, cracks and separation Destructive; examines only the selected section
Dye-and-pry BGA or LGA interface failure analysis Dye indications at cracked or separated interfaces Destructive; does not provide a metallographic cross-section

For a new assembly, map package type, accessibility, process history and failure severity to the chosen method. Use solder joint testing only as complementary evidence. This makes coverage auditable and avoids paying for irrelevant inspection.

What Can Human Visual Inspection of Solder Joints Reliably Detect?

Human visual inspection can reliably detect accessible surface defects when the method is controlled. It works well for first articles, low-volume builds and rework verification. It also helps resolve borderline AOI calls.

Human visual inspection of solder joints under a microscope
  • Confirm the acceptance basis: Verify the assembly revision, product class and applicable standard before inspection. Keep approved deviations and package-specific criteria at the workstation.
  • Control the viewing conditions: Use clean optics, stable board support and repeatable illumination. Select magnification that shows the full joint and the required detail. Change the viewing angle when leads or nearby parts create shadows.
  • Inspect in a fixed sequence: Scan the board by region and reference designator. Check every required location once before reviewing suspected defects. This method reduces missed joints and duplicate inspection.
  • Evaluate joint formation: Check visible wetting, solder quantity, fillet shape and terminal alignment where applicable. Confirm that the lead or termination remains seated. Look for acceptable clearance from adjacent conductors.
  • Find connection defects: Visual inspection can reveal bridges, visible opens and obvious insufficient or excessive solder. It can also find disturbed joints, lifted leads, solder balls and cracked surface fillets.
  • Find placement defects: Check polarity, offset, skew, tombstoning, missing parts and damaged components. Confirm that the visible termination reaches its intended land.
  • Find workmanship damage: Look for contamination, flux residue outside the allowed condition and foreign material. Inspect solder mask, lands and laminate for heat, handling or rework damage.
  • Record objective evidence: Identify the board, lot and reference designator. Save a clear image with the viewing angle and useful scale. Record the defect category, acceptance clause and final disposition.
  • Escalate hidden or uncertain conditions: Use X-ray for obscured BGA, QFN and LGA connections. Use electrical testing when function or continuity must be proven. Request cross-section analysis when internal structure or failure cause remains uncertain.

Appearance alone cannot prove electrical continuity or long-term reliability. Lead-free solder may appear matte without being defective. A shiny surface does not prove complete wetting. Validate the work instruction with known defects and periodic inspector-agreement checks.

How Do SPI and AOI Support Automated Solder Joint Inspection?

SPI measures solder paste before reflow. It identifies printing variation before that variation becomes a finished-joint defect.

AOI checks visible component and solder conditions after placement or soldering. It verifies whether the assembly result matches the controlled program and acceptance criteria.

SPI and AOI supporting automated solder joint inspection

SPI measures paste height, area, volume, offset and shape. Repeated low volume can indicate a blocked aperture or poor paste release. Position drift can indicate board support, stencil alignment or printer setup problems.

AOI inspection in PCB assembly compares optical or 3D data with programmed limits. It checks component presence, polarity, position and visible solder features. It can also flag bridging, lifted leads, tombstoning and visible solder-volume anomalies.

SPI and AOI become more useful when their records are correlated by board and designator. Low paste volume followed by insufficient solder points toward printing. Acceptable paste followed by component offset points toward placement, board movement or reflow.

Control both programs by product revision and package type. Verify lighting, measurement repeatability and reference samples before production. Review false calls and escapes separately before changing inspection limits.

When Is X-Ray Solder Joint Inspection Required and What Hidden Defects Can It Detect?

X-ray solder joint inspection is needed when critical evidence is hidden from optical inspection. The inspection plan should state the target locations, method, coverage and acceptance basis.

X-Ray solder joint inspection for hidden BGA and QFN defects
  • Hidden area-array packages: Use X-ray for BGA, LGA and bottom-terminated QFN joints. Optical inspection cannot see the complete connection beneath these packages.
  • Obscured through-hole joints: Use X-ray when connectors, shields or board geometry hide required barrel-fill evidence. Do not infer internal fill from one visible surface.
  • First-article validation: Inspect named high-risk packages before releasing the process. Compare the images with SPI, placement and reflow records.
  • Production monitoring: Define full, sampled or risk-based coverage by board, package and designator. Increase coverage after a process change or adverse trend.
  • Failure investigation: Use X-ray before destructive analysis when hidden opens, shorts or solder-distribution problems are suspected. Preserve the original images and machine settings.
  • Bridges and missing solder: X-ray can show solder connections between adjacent features, missing balls and major solder-volume differences.
  • Alignment and collapse: Compare ball position, diameter and shape across the package. Irregular patterns can indicate offset, uneven collapse, warpage or local thermal imbalance.
  • Voids and solder distribution: Measure the defined joint or thermal-pad area with a controlled projection method. Record both total voiding and harmful local concentration when required.
  • Open-joint indications: Look for separation, abnormal ball shape and inconsistent collapse. Head-in-pillow and nonwet opens may remain difficult to confirm in a top-down 2D image.
  • Overlapping structures: Use oblique views, laminography or CT when copper planes and components obscure the target. Select the simplest method that resolves the required feature.

X-ray inspection for PCB assembly does not prove electrical function or metallurgical strength. Confirm ambiguous indications with electrical results, process history or destructive analysis. Record the view, settings, designator, finding and disposition.

How Should BGA, QFN, LGA and Through-Hole Solder Joints Be Inspected?

Match the inspection sequence to joint visibility and credible package failure modes. Begin with paste and placement evidence where available. Inspect the formed joint with the appropriate optical or X-ray method.

Use electrical testing as supporting evidence. It does not prove physical joint quality.

  • BGA solder joint inspection: Review pre-reflow SPI. Then use 2D X-ray to check ball population, alignment, collapse, bridges and void patterns. Use oblique views or CT when structures overlap. Escalate irregular collapse or head-in-pillow indicators. Use electrical testing because X-ray alone does not prove connectivity.
  • QFN solder joint inspection: Verify paste coverage and thermal-pad stencil segmentation before reflow. After reflow, check alignment and accessible perimeter evidence. QFN package guidance shows why standard cut flanks may not provide a reliable toe fillet. Use X-ray to check thermal-pad distribution, concentrated voiding, shorts and package lift. Apply the agreed void criteria.
  • LGA inspection: Confirm paste uniformity and placement before the joints become hidden. Use X-ray after reflow to compare solder distribution, alignment, open-joint signatures, bridges and package tilt. Correlate anomalies with electrical results and reflow history; repeated location-specific defects require review of land geometry, coplanarity and thermal balance.
  • Through-hole inspection: Inspect both sides for lead and land wetting, circumferential evidence, solder fill, protrusion, clearance, bridging and damage. When the barrel is obscured, use X-ray or approved destructive analysis rather than inferring fill from one surface. Reinspect reworked joints for lifted lands, plating damage and contamination.

For BGA soldering and other hidden terminations, record the inspected designators, viewing program, acceptance basis and disposition. This evidence is more useful than a generic “X-ray passed” statement.

What Steps Are Included in the Solder Joint Inspection Process?

A complete solder joint inspection procedure controls requirements, risk, equipment, disposition and corrective action. Each stage should leave enough evidence for another qualified person to reproduce the decision.

  1. Establish the acceptance basis: Confirm the drawing, BOM revision, workmanship standard and revision, product class, customer criteria and approved deviations. Resolve conflicts before inspection.
  2. Define the inspection population: Record the work order, board revision, lot size and inspected quantity. State whether coverage applies to every board, a defined sample, first articles or named critical locations.
  3. Map package and process risks: Identify hidden packages, fine pitch, high-current joints, thermal pads, selective-soldered connectors and reworked areas. Link each to credible defects and failure consequences.
  4. Select complementary methods: Match visual inspection, SPI, AOI, X-ray and electrical tests to defect visibility and risk. Reserve destructive analysis for validation or failure investigation. Document each method’s limitation.
  5. Verify inspection readiness: Check calibration, program revision, fixtures, lighting, magnification, X-ray settings and reference evidence. Run the approved verification routine before accepting production results.
  6. Inspect in process order: Review paste before reflow, visible conditions after soldering and hidden structures by X-ray. Record board ID, designator, method, defect code and supporting evidence during inspection.
  7. Control nonconforming findings: Segregate affected material, distinguish confirmed defects from ambiguous indications and preserve evidence. Only designated personnel should accept, reject, rework or escalate the result.
  8. Verify rework and lot impact: Reinspect with a method that can find the original defect, then check for rework damage. Determine whether the same mechanism may affect other units or locations.
  9. Close corrective action: Trend defects by package, location, machine, material and profile. Correct the verified cause, confirm performance on subsequent builds and update the control plan when improvement is sustained.

What Should Be Included in a Solder Joint Inspection Checklist and Report?

A useful solder joint inspection checklist identifies the product, acceptance basis, scope, evidence and disposition. The solder joint inspection report must make coverage traceable. A simple “pass” is not sufficient.

  • Product and lot identity: Record part number, revision, work order, lot or serial IDs, lot quantity and inspected quantity.
  • Acceptance requirements: State the standard and revision, product class, drawing requirements, customer additions and approved deviations.
  • Inspection scope: Identify the process stage, locations, package groups, sample size, coverage level and methods. Distinguish full-board coverage from selected critical joints.
  • Equipment and program control: Record equipment ID, calibration status, program revision, fixture and settings needed to reproduce the result.
  • Finding details: Record board ID, designator, defect code, condition, severity, count and supporting image or measurement. Avoid vague descriptions such as “bad solder.”
  • Result summary: State accepted, rejected, reworked and pending-review quantities. Separate confirmed defects, false calls and unresolved indications.
  • Disposition and reinspection: Record the decision, rework authorization, reinspection method and result for each affected unit.
  • Approval and traceability: Include the inspector, dates, disposition authority and attachment references. Retain the record for the required period.

Agree on the report format before ordering when traceability matters. Engineers should identify critical designators and hidden joints in the assembly data.

Procurement should confirm programming, sampled or 100% coverage, archived images and reinspection after rework.

What Determines Solder Joint Inspection Coverage, Sampling and Cost?

Solder joint inspection cost depends on risk, visibility, volume, evidence requirements and process capability. “100% inspection” is incomplete without the characteristics, method and stage. AOI of every board does not cover every hidden joint.

  • Assembly risk: Safety, high-current and harsh-environment functions justify stronger evidence.
  • Package mix: Hidden joints and dense layouts increase X-ray time and interpretation complexity.
  • Build maturity: New products and unstable trends need greater initial coverage.
  • Sampling basis: Lot size, history, capability, contract and escape consequence should drive the plan.
  • Reporting depth: Archived images and serial-level traceability add labor and data handling.
  • False-call burden: Poor programming increases review time without improving detection.

Ask suppliers to separate one-time programming or setup charges from recurring per-board inspection costs. For critical packages, confirm whether pricing includes every unit, a defined sample or only failure investigation.

How Can Inspection Results Prevent Recurring Solder Joint Defects?

Inspection prevents recurrence only when each finding is linked to a verified cause and controlled correction. Reject counts alone do not show where the process failed.

  • Contain the affected population: Identify the lot, time window, line and component batches. Hold suspect material and increase inspection at the affected designators.
  • Normalize the defect data: Report defects per board, joint or inspection opportunity. Separate true defects, false calls and unconfirmed indications.
  • Stratify the pattern: Compare results by product, designator, package, printer, placement machine, oven profile and operator. A repeated location often indicates a local design or process cause.
  • Confirm the failure mechanism: Use a second inspection method when the first result is ambiguous. Preserve samples for cross-section, dye-and-pry or other approved failure analysis when needed.
  • Correct printing causes: For insufficient or excessive solder, check aperture design, stencil condition, paste handling, support and printer alignment. Verify the correction with SPI data.
  • Correct placement causes: For offset, skew or tombstoning, check pickup accuracy, nozzle condition, placement force and land balance. Confirm component and PCB dimensional variation.
  • Correct reflow causes: For non-wetting, opens or uneven BGA collapse, review the measured profile, alloy, surface condition and package warpage. Reprofile the actual assembly after a material or layout change.
  • Correct through-hole causes: For low barrel fill, review flux application, preheat, contact time, solder temperature and thermal demand. Do not increase one setting without checking heat-sensitive parts.
  • Validate effectiveness: Inspect a defined number of subsequent boards using the method that detected the original defect. Check that the correction did not create a different failure mode.
  • Lock the improved process: Update programs, work instructions, control limits and training. Continue trend review until the improvement remains stable across normal production variation.

The corrective-action record should connect the defect, evidence, root cause, change and verification result. This record prevents teams from investigating the same problem without its history.

FAQs About Solder Joint Inspection

Q1: What should happen when AOI and X-ray results disagree?

A1: Hold the material and review what each method measured. Check the images, limits, package geometry and electrical result. Use higher-resolution or destructive analysis if risk remains unresolved.

Q2: Should solder joints be inspected before conformal coating or underfill?

A2: Yes, inspect before materials obscure access. Record the result and control any later rework.

Q3: Can X-ray inspection damage electronic components?

A3: Validated production exposure is normally nondestructive, but dose still requires control. Radiation-sensitive devices and repeated scans need component-specific review. Define exposure settings and limits before inspection.

Q4: Can a golden board replace written acceptance criteria?

A4: No. A golden board can support program verification but cannot replace the specified standard and customer requirements. It may contain variation that should not become a new acceptance limit.

Q5: When should inspection limits be revalidated?

A5: Revalidate after changes that can alter the joint or its image. Examples include component, PCB, stencil, alloy, equipment, program or reflow changes. Recurring false calls also require review.

Q6: Does successful reflow of a failed joint prove the original root cause?

A6: No. Recovery after reheating is evidence, not proof. Reflow changes solder, flux and mechanical contact. Preserve electrical data and images before repair, then investigate the original process conditions.

Q7: How can consistency between inspectors be checked?

A7: Use qualified samples and periodic attribute-agreement studies. Compare decisions by defect type, then retrain or clarify criteria where agreement is weak.

Q8: Why can an intermittent solder joint pass a room-temperature electrical test?

A8: A static test may not reproduce thermal or mechanical movement. Use controlled hot, cold, vibration or flex testing when service conditions justify it. Monitor the affected circuit while stress is applied.

Q9: Can inspection images from different systems be compared directly?

A9: Only when scale, angle, lighting or X-ray settings and image processing are controlled. Otherwise, apparent differences may come from the imaging setup rather than the joint.

Q10: Should inspection thresholds be relaxed to reduce false calls?

A10: Not without validation. Review the false-call cause, confirm known defects remain detectable and approve the revised limit before production use.

Need a PCBA quotation with a defined solder joint inspection plan? Send Gerber or ODB++, BOM, pick-and-place data, assembly drawings, quantity and product class. Include critical joints, testing requirements and traceability expectations.

EBest Circuit can review your inspection scope and prepare a practical quotation. Send the project package to sales@bestpcbs.com.

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