PCB manufacturing PCB manufacturing
Home > Blog

Plated Through Hole

PCB Square Pad vs Round Pad: What’s the Difference and When to Use Each?
Tuesday, October 13th, 2026

PCB square pad vs round pad compares copper outlines, while the hole shape is a separate feature. A square pad commonly marks Pin 1, while round pads commonly serve the other through-hole pins. The choice still depends on the footprint, pad and hole dimensions, spacing, and assembly conditions. A square pad does not necessarily mean positive polarity, and it is not inherently more reliable.

When you see a square pad, confirm what it identifies before orienting the component. When you build or edit a footprint, decide whether changing the shape helps assembly and whether the finished hole, copper area, and nearby clearances remain suitable.

PCB Square Pad vs Round Pad, https://www.bestpcbs.com/blog/2026/10/pcb-square-pad-vs-round-pad/

PCB Square Pad vs Round Pad: What Are the Main Differences?

The visible distinction is the copper outline, not necessarily the hole. In the comparison below, both pads are plated through-holes with a centered round hole. Surface-mount lands follow package-specific assembly rules and are outside this through-hole comparison.

Comparison Square through-hole pad Round through-hole pad
Copper outline Four straight sides and four corners Circular edge at a constant radius
Common identification use Often marks Pin 1 or the footprint starting point Often used for the remaining pins
Copper at the same outer width Greater outline area because the corners add copper Smaller outline area within the same diameter
Clearance envelope Corners reach farther diagonally from the center Boundary is equally distant from the center in every direction
Typical reason to choose it Visual Pin 1 cue when the footprint convention requires it Consistent geometry when a special pin marker is unnecessary

These are conventions and geometric consequences, not automatic electrical properties. At the same outer width and hole size, the square occupies more area at its corners; at the same copper area, the two pads have different outer dimensions. A valid comparison must state which condition is held constant.

Pad shape does not determine drill shape. Most square through-hole copper pads surround round plated holes. EDA tools store the land, hole, mask opening, and plane connection as separate footprint features.

Why Do PCBs Often Use a Square Pad for Pin 1?

A square pad gives designers, assemblers, and repair technicians a quick visual reference for the beginning of a pin sequence. On a single-row through-hole header, for example, the square land can identify Pin 1 while Pins 2 through 8 remain round. On a DIP footprint, it can reinforce the package notch, dot, silkscreen outline, and assembly drawing rather than replace them.

This practice is a common footprint-library convention because the shape remains visible in PCB artwork and can be recognized even when a reference designator is hard to read. It also helps when comparing the physical board with a schematic symbol or connector pinout. The convention is useful only when the footprint pad number, schematic pin number, and component drawing all agree.

The square is an orientation cue, not independent proof of pin numbering. A custom or legacy library may use another marker, and some non-polarized footprints use identical pad shapes. Confirm Pin 1 against controlled design data before assembly or rework.

Does a Square PCB Pad Always Indicate Positive Polarity?

No. Pin number and electrical polarity describe different things. Pin 1 may be a supply input, ground, signal, enable pin, shield connection, or another function, depending on the component definition; a square pad identifies the numbered position only when the footprint convention says it does.

Confirm polarity by tracing the component data sheet through the schematic to the footprint pad numbers. Check the silkscreen, assembly drawing, and the component’s molded, printed, notched, or banded mark. These sources should indicate the same installed direction.

Consider a polarized radial capacitor in a footprint whose square pad marks Pin 1. That pin could be assigned to the positive lead in one verified library, but the square cannot establish that assignment by itself. If the symbol-to-footprint mapping or library convention differs, using shape alone could reverse the component even though the land pattern looks familiar.

How Does Pad Shape Affect Copper Area and Clearance?

Pad shape changes the copper envelope when the comparison uses the same outer width and the same centered hole. Let the square side and circle diameter both be D, and let the round-hole diameter be d. The square outline area is D2, while the circular outline area is pi × D2/4; the hole removes pi × d2/4 from either ideal outline.

Geometric illustration only: suppose D is 2.0 mm and d is 1.0 mm. These values are chosen to make the arithmetic clear, not to recommend a pad or finished-hole size.

Ideal two-dimensional result Square pad Round pad
Outer copper area 4.00 mm2 3.14 mm2
Round-hole area 0.79 mm2 0.79 mm2
Copper remaining after subtracting the hole 3.21 mm2 2.36 mm2
Farthest reach from pad center 1.41 mm at a corner 1.00 mm at the circular edge

Although the square has about 0.86 mm2 more copper in this ideal view, both shapes have the same nominal ring at the square’s flat side or the circle’s edge: (D – d)/2, or 0.50 mm before manufacturing tolerances. The extra corner copper does not increase that narrowest ring. It does not, by itself, prove a stronger joint, higher current rating, better heat transfer, or greater field reliability.

Clearance can move in the opposite direction. The square corner extends roughly 0.41 mm farther from center in this example, leaving less space for a diagonal trace, pad, pour, or board edge. If equal copper area is the target, recalculate clearance from the new envelopes rather than reusing the equal-width result.

PCB Square Pad vs Round Pad, https://www.bestpcbs.com/blog/2026/10/pcb-square-pad-vs-round-pad/

PCB Square Pad vs Round Pad: How Does Soldering Differ?

For comparable through-hole joints, outer shape is only one soldering condition. Finished-hole fit, lead geometry, pad size, finish, flux, preheat, heat input, dwell time, and joint access can matter more. A square outline cannot compensate for a tight hole, undersized ring, or unsuitable process window.

The copper connected beyond the pad is especially important. Imagine the same through-hole connector with one round pad tied directly to a large ground plane and one square pad connected through an effective thermal relief. The round pad may require more heat because the plane removes energy from the joint, even though someone comparing shape alone might predict the opposite. Reversing the plane connections could reverse the observed behavior.

Separate wetting on the visible land from solder fill inside the plated barrel. Land geometry affects the exposed surface and local solder-mask boundary, while barrel fill depends on hole-to-lead fit, plating, thermal balance, solder delivery, and process control. Square corners do not inevitably create a soldering defect, and a round outline does not guarantee complete fill or a reliable connection.

PCB Square Pad vs Round Pad: When Should You Use Each?

Use shape as a controlled footprint decision. A square pad is valuable when a clear Pin 1 cue helps placement or inspection and the corner envelope still meets spacing rules. Round pads are appropriate for the other pins or for a footprint in which every pin may use the same shape without losing necessary orientation information.

Design condition Preferred action Reason to verify
Pin 1 needs a visible board-level cue Use a square pad for Pin 1 and round pads for the remaining pins Confirm the cue agrees with the symbol, footprint numbering, and component drawing
The part is non-polarized and pin distinction is unnecessary Round pads may be used throughout Check that assembly and test documentation do not rely on a special marker
Available diagonal space is limited Evaluate a round pad or resize the approved land pattern Check annular ring and copper clearance after every change
A manufacturer footprint or validated library already exists Follow it unless a documented design need justifies a revision Revalidate numbering, dimensions, mask, courtyard, and assembly evidence if modified

An oval or rounded rectangle may solve a specific lead or spacing problem, but it should not be added for visual variety. Follow the component land pattern, controlled library convention, available space, and confirmed fabrication and assembly capabilities.

Changing one pad in a verified footprint can alter clearance, solder-mask webs, copper-pour behavior, thermal connections, and automated checks. Preserve the original revision, document the reason, and rerun the relevant electrical, DFM, and assembly checks.

How Should You Size Square and Round Through-Hole Pads?

Start with maximum lead dimensions, not a typical value. Compare a round lead’s maximum diameter with the finished-hole range. For a square lead in a round hole, check the maximum corner-to-corner dimension: a sharp square of side a has diagonal a√2. Rounded corners, chamfers, plating, or a rectangular section change the actual envelope.

Set the finished hole from lead variation, insertion allowance, plating, drill behavior, and assembly method. A wave-soldered connector, a hand-inserted component, and a press-fit contact do not share one clearance rule. Press-fit systems require the connector manufacturer’s hole and plating specification.

Size the land from the required finished annular ring and the fabricator’s tolerances. For a centered round hole, pad width = finished-hole diameter + 2 × nominal ring is a starting relationship. Choose the nominal ring so the narrowest finished copper still passes after drill offset, hole-size variation, etch effects, and applicable standards.

The square pad’s corners add area but do not replace copper at the flat sides, its narrowest locations around a round hole. Check those sides for annular-ring compliance, then check the corners against neighboring pads, traces, planes, slots, and the board edge. A round pad uses the same radial clearance in every direction, but it still needs a tolerance-aware clearance check.

Set the solder-mask opening and assembly conditions as independent constraints. The opening must expose the intended land without eliminating a required mask web or creating an unreviewed bridge between close pads. Confirm whether the fabricator uses specified mask expansion, adjusted production data, or other documented rules, and verify that inspection and solder access remain practical for the selected process.

PCB Square Pad vs Round Pad, https://www.bestpcbs.com/blog/2026/10/pcb-square-pad-vs-round-pad/

What Pad Design Checks Are Needed Before PCB Manufacturing?

Run the checks on the released footprint and manufacturing outputs, not on an earlier library preview. Before manufacturing, review the final PCB square pad vs round pad choice against the same component installation, numbering, physical fit, and output data.

  • Pin identity: match the data-sheet pin numbers to the schematic symbol, footprint pad numbers, and assembly drawing.
  • Polarity evidence: compare the component body mark, silkscreen, assembly notation, and electrical assignment instead of inferring polarity from pad shape.
  • Finished-hole fit: check maximum lead dimensions, including the diagonal of square or rectangular pins, against the specified finished-hole range and insertion method.
  • Annular ring: verify the narrowest finished ring after relevant hole, registration, and copper tolerances.
  • Copper clearance: measure square-pad corners and all nearby traces, pours, pads, slots, and board edges using the applicable production rules.
  • Solder mask and assembly: review mask openings, mask webs, thermal reliefs, plane connections, solder access, and inspection needs.
  • Output consistency: confirm the Gerber or other copper data, drill file, fabrication notes, BOM, pick-and-place data where applicable, and assembly drawing use the same footprint revision and orientation.

EBest Circuit can review the pad, hole, clearance, mask, and assembly conditions against the intended manufacturing process. For a DFM review, send the Gerber files, drill files, BOM, and assembly drawing to sales@bestpcbs.com, along with the component data sheet when lead dimensions or pin orientation need confirmation.

FAQs About PCB Square Pad vs Round Pad

Q1: Can a mechanical mounting pin use a square copper pad?

A1: Yes, when the land pattern calls for copper. Some retention or shield pins need a plated copper land, while a purely mechanical feature may use a non-plated hole with no copper. Follow the component drawing; a square outline does not improve retention by itself.

Q2: Can one through-hole pad use different copper shapes on different layers?

A2: Yes, in pad-stack systems that support layer-specific geometry. Use different shapes only for a documented electrical or manufacturing purpose, then inspect every copper layer together with the drill data before release.

Q3: Must the Pin 1 copper marker remain visible after component placement?

A3: Not necessarily. The marker must help orient the part before insertion, but a component body may cover it afterward. If inspection or rework needs a visible reference, add a matching external cue on the silkscreen or assembly drawing.

Q4: Will the solder-mask opening always preserve a square pad outline?

A4: No. Mask expansion, a separately defined mask shape, a merged opening, or tenting can change what remains visible. Check the actual solder-mask output if operators are expected to use the square outline as a Pin 1 cue.

Q5: Can a through-hole pad also serve as a test point?

A5: Yes, if it meets the test requirements. Confirm the probe side, accessible contact area, surface finish, clearance, mechanical support, and expected contact cycles. The pad’s square or round outline is secondary to reliable probe access.

Q6: Should one pad-shape convention be used across the whole PCB?

A6: Usually, because consistency reduces interpretation errors. A manufacturer-recommended or verified library footprint may justify an exception. Document it and keep the schematic, footprint, assembly drawing, and test documentation aligned.

You may also like

Tags:, , , ,
Posted in PCB Design | No Comments »

PCB Plasma Desmear: Process, Benefits, and Quality Checks
Saturday, September 5th, 2026
Multilayer PCB panels undergoing plasma desmear with a clean plated-hole cross-section
Plasma desmear removes organic drilling residue before hole-wall metallization when the process is qualified for the actual PCB construction.

PCB plasma desmear uses a controlled low-pressure plasma to remove organic drilling smear and condition hole walls before electroless copper and plating. It is especially useful where mechanical drilling or laser processing leaves polymer residue that can block a reliable connection to exposed inner-layer copper.

Plasma is not automatically better than a chemical desmear for every board. The correct route depends on laminate chemistry, hole type, aspect ratio, layer structure, required etchback and the fabricator’s qualified process. Buyers should ask how the selected process is controlled and verified for their exact construction.

What PCB Plasma Desmear Removes

Plasma desmear primarily removes carbon-based resin residue from drilled or laser-formed hole walls. Mechanical drilling can heat and smear resin across exposed copper. Laser ablation can leave organic residue or redeposited material inside microvias. If that layer remains, subsequent metallization may not form a consistent electrical interface.

The process can also modify the polymer surface to improve wetting and adhesion for the next manufacturing stages. It does not replace every cleaning, conditioning or metallization step, and it cannot repair a badly positioned drill, damaged inner-layer pad or incorrect stackup.

Why Drill Smear Blocks a Reliable Inner-Layer Connection

Smear can act as an insulating film between the plated barrel and the inner-layer copper. A finished hole may look continuous from the surface while the buried junction remains weak or open. Thermal cycling can further expose an incomplete connection.

The risk is not determined by visible residue alone. Engineers should evaluate the actual inner-layer junction, copper coverage and interconnect continuity. For a broader view of the finished structure, see our plated through-hole PCB guide.

How the Plasma Desmear Process Works

  1. Load panels or coupons in a fixture that allows gas access to the relevant holes.
  2. Evacuate the chamber to the controlled process pressure.
  3. Introduce the qualified process gases.
  4. Apply radio-frequency energy to create reactive plasma species.
  5. Allow the plasma to react with exposed organic residue.
  6. Remove volatile reaction products through the vacuum system.
  7. Complete any required conditioning and metallization route.
  8. Verify the result with process coupons, microsections or other agreed evidence.

Recipe time, gas balance, pressure, power, loading and fixture geometry interact. A recipe qualified for one laminate or hole geometry should not be assumed suitable for another.

Plasma Desmear vs Permanganate Chemical Desmear

Decision point Plasma route Chemical route
Removal mechanism Gas-phase reaction with organic residue Wet chemical oxidation and conditioning
Material fit Useful for selected high-performance resins and small features when qualified Established for many conventional multilayer constructions
Access Depends on chamber loading and gas transport into holes Depends on solution exchange and wetting
Process control Power, pressure, gas, time and load geometry Concentration, temperature, dwell, agitation and bath loading
Verification Hole-wall/junction evidence on representative samples Hole-wall/junction evidence on representative samples
Comparison of plasma and chemical PCB desmear routes from resin smear to a clean hole wall
Both routes need construction-specific controls and evidence; the selection is not based on equipment novelty.

Where Plasma Treatment Is Most Useful

Plasma becomes valuable when the material system, feature geometry or residue is not well served by the standard wet route. Potential applications include selected high-performance laminates, PTFE-containing constructions, flex materials, small laser vias and hybrid stackups. Suitability still requires fabrication review and qualification.

  • Confirm every dielectric material and adhesive in the stackup.
  • Separate mechanically drilled holes from laser microvias.
  • Identify the smallest, deepest and most difficult-to-access features.
  • Define whether desmear, etchback or surface activation is required.
  • Review material-supplier processing guidance where available.
  • Use representative coupons rather than a simpler substitute construction.

For microvia structure decisions, refer to the HDI PCB fabrication guide.

Process Inputs That Must Be Controlled

A repeatable plasma result depends on controlled inputs, load configuration and equipment condition.

  • verified material and stackup revision;
  • hole type, depth, diameter and panel thickness;
  • preclean and drying condition;
  • gas identity, flow and mixture;
  • chamber pressure, power and exposure time;
  • panel spacing, orientation and batch loading;
  • electrode/chamber cleanliness and maintenance;
  • recipe revision, operator and lot traceability;
  • time and handling before downstream metallization.

Monitor actual process records, not only the programmed recipe. A load that shields holes or changes gas distribution can fail even when the screen shows the expected settings.

Need a desmear route reviewed for your stackup?

Send the controlled stackup, material designations, drill files, via structures and inspection requirement. EBest Circuit can review whether plasma, chemical desmear or a qualified combination should be discussed before quotation.

Request a DFM ReviewEmail the Stackup and Drill Data

Signs of Under-Desmear and Over-Treatment

Condition Possible evidence Next check
Under-desmear Residual smear, incomplete inner-layer copper exposure or weak metallization interface Recipe/load access and preclean condition
Nonuniform treatment Panel-position or hole-orientation variation Fixture, loading, chamber uniformity and sample map
Over-treatment Excessive resin removal, glass exposure or altered hole geometry Exposure severity and material compatibility
Downstream issue Clean wall but plating void or poor coverage Conditioning, activation and metallization controls
Preparation artifact Apparent residue or relief changes between sections Repeat specimen preparation

A clean-looking wall does not prove the full plated connection is acceptable. Review the junction after downstream processing and distinguish desmear evidence from plating evidence.

How to Qualify Plasma Desmear for a PCB Construction

  1. Freeze the representative stackup, materials and hole structures.
  2. Define the defect or residue that the process must remove.
  3. Select worst-case features and panel locations.
  4. Run a controlled recipe window with traceable loads.
  5. Inspect hole walls and inner-layer junctions before and after metallization.
  6. Apply any required thermal or reliability conditioning.
  7. Compare electrical and cross-sectional evidence with acceptance requirements.
  8. Document the approved recipe, load limits, controls and requalification triggers.

Requalification may be needed after material, stackup, hole geometry, equipment, recipe or loading changes. The trigger should be defined in the control plan rather than decided after a failure.

Microsection and Hole-Wall Evidence to Review

Microsection evidence should show the full feature and the critical junctions at useful magnification. Record sample identity, panel position, hole type, orientation, preparation condition and whether the specimen was thermally stressed.

  • remaining smear or organic residue;
  • inner-layer copper exposure and junction condition;
  • resin and glass morphology;
  • barrel coverage and plating continuity;
  • voids, separation, cracks or over-etchback;
  • comparison across panel positions and process loads.

Use our PCB microsection analysis guide to structure the report. If a copper/dielectric gap is present, also review the hole wall pullaway guide rather than labeling every junction anomaly as smear.

Design and Stackup Information the Fabricator Needs

  • Gerber or ODB++ and released fabrication drawing;
  • complete material and adhesive designations;
  • controlled stackup and copper weights;
  • NC drill and laser data with hole groups;
  • finished dimensions and layer connections;
  • special desmear or etchback requirement;
  • acceptance class and customer-specific criteria;
  • coupon, microsection and thermal-test requirements;
  • quantity, revision, delivery and traceability needs.

A fabrication note that only says “plasma required” is incomplete. State why it is required and allow the fabricator to confirm the qualified route for the actual construction.

Cost and Lead-Time Questions for an RFQ

Plasma cost is influenced by qualification, batch loading, material route, inspection and whether the process is standard for the construction. Ask:

  • Is plasma already qualified for every specified material?
  • Is a trial or coupon build required?
  • Which hole groups receive the treatment?
  • What inspection and report are included?
  • What changes would trigger requalification?
  • Does the route add handling, queue or outsourced-process time?
  • How are loads and recipe revisions traced?

Quote the process and evidence together

Include material, stackup, hole groups, quantities and required inspection. That allows the manufacturing route, qualification effort and lead-time impact to be evaluated before release.

Submit PCB Files for a QuoteDiscuss Process Qualification

FAQ About PCB Plasma Desmear

What is smear in a drilled PCB hole?

It is resin residue displaced or redeposited on the hole wall, potentially covering exposed inner-layer copper.

Does plasma desmear replace electroless copper?

No. It prepares the hole wall; metallization and electroplating are separate downstream processes.

Is plasma required for every multilayer PCB?

No. Many constructions use qualified wet chemical desmear. Selection depends on materials, geometry and the fabricator’s validated route.

Can plasma be used for microvias?

It can be useful for selected laser-via constructions, but gas access, material compatibility and qualification must be confirmed.

Is plasma always better for PTFE materials?

No universal rule applies. The exact PTFE-containing material, surface treatment and downstream process determine the route.

Can too much plasma damage a hole wall?

Excessive treatment can change resin/glass morphology or geometry, so the recipe needs a controlled window.

How is desmear effectiveness inspected?

Representative microsections can show residue removal, inner-layer exposure and the plated junction; process coupons and electrical/reliability evidence may also apply.

What is the difference between desmear and etchback?

Desmear targets drilling residue. Etchback intentionally removes dielectric to expose more inner-layer copper; requirements should be stated separately.

What should be included on the drawing?

Identify materials, hole groups, relevant treatment intent, acceptance criteria and required coupon or inspection evidence.

What proves the process is controlled?

Approved recipes, actual load records, maintenance, traceability and representative verification evidence together provide stronger proof than a generic equipment claim.

Final Process-Selection Checklist

  • Identify the actual smear/residue and hole type.
  • Confirm every dielectric and adhesive material.
  • Compare plasma and chemical routes for the construction.
  • Define load, recipe and maintenance controls.
  • Inspect inner-layer junctions after downstream metallization.
  • Qualify worst-case features and panel positions.
  • Document requalification triggers.
  • Include process and evidence requirements in the RFQ.

Request a construction-specific PCB process review.

Send Gerber or ODB++, stackup, material designations, drill/laser data, inspection criteria, quantity and delivery target to sales@bestpcbs.com, or use the PCB quote form. EBest Circuit will review the manufacturing route and identify any qualification evidence needed before production.

You may also like

Tags:, ,
Posted in bestpcb | No Comments »

PCB Hole Wall Pullaway: Causes, Inspection, and Prevention
Saturday, September 5th, 2026
Metallurgical microscope inspection of PCB hole wall pullaway in a plated through-hole cross-section
Hole wall pullaway is confirmed from a prepared cross-section, not from a surface photograph alone.

PCB hole wall pullaway is a separation between the plated copper barrel and the surrounding dielectric along a drilled hole. It is a cross-sectional finding, and it should not be diagnosed from a vague electrical failure or a top-view image. The first job is to confirm where the separation exists, whether it appeared before or after thermal stress, and whether other plated-through-hole defects are present.

A confirmed finding does not automatically prove one root cause or justify scrapping every board. Quality teams need representative samples, controlled microsection preparation, lot traceability and a cause-specific corrective-action plan. This guide gives designers, buyers and supplier-quality engineers a practical sequence for making that decision.

What PCB Hole Wall Pullaway Looks Like in Cross-Section

The characteristic feature is a visible gap at the interface between the plated hole copper and the resin/glass wall. The separation may be local or extend along part of the barrel. Its position, length, frequency and relationship to internal-layer connections should be recorded rather than reduced to a simple pass/fail label.

A useful micrograph shows the full hole, the affected interface and enough magnification to distinguish a true gap from polishing relief. The report should identify the board, lot, coupon or production location, section orientation, preparation condition and whether the specimen was thermally stressed.

Preparation artifacts can mimic separation. Excessive grinding pressure, poor specimen support, smeared resin, edge rounding or unsuitable etching can distort the interface. When the feature appears only on one questionable section, prepare another specimen before assigning a manufacturing cause.

Why Hole Wall Pullaway Matters After Thermal Stress

Pullaway matters because the plated barrel and dielectric experience different mechanical and thermal behavior, and loss of support can accompany a broader interconnect-reliability problem. The actual product risk depends on location, extent, associated cracks or voids, copper condition, end-use stress and the governing acceptance requirement.

A feature visible before stress points the investigation toward material condition, hole preparation, lamination and plating history. A feature that appears or grows after a defined thermal exposure may indicate that the interface could not tolerate the applied expansion and contraction. The test method, temperature profile, dwell, cycles and sample conditioning therefore belong in the evidence package.

Do not use one dramatic micrograph to generalize across a production lot. Sampling must cover relevant panel positions, hole sizes, constructions and process batches. Electrical continuity alone also cannot reveal every developing interface problem.

Hole Wall Pullaway vs Plating Voids, Barrel Cracks, and Hole Breakout

Similar-looking hole defects require different corrective actions, so classify the morphology before changing the process.

Finding Where it appears Diagnostic clue Primary review direction
Hole wall pullaway Copper-to-dielectric interface Gap follows part of the hole wall Interface preparation, material and thermal history
Plating void Within or missing from deposited copper Discontinuous copper coverage rather than interface separation Cleaning, activation and deposition/plating control
Barrel crack Across plated copper Fracture passes through the copper wall Copper properties, thickness, geometry and thermal strain
Inner-layer separation Barrel-to-inner-layer junction Connection defect is concentrated at an internal pad Desmear, etchback and interconnect formation
Hole breakout Annular ring at a land Drill position removes part of the surrounding pad Registration, drill size and annular-ring design

A board can contain more than one defect. Record each morphology independently. For broader context on how prepared sections reveal hidden features, see the PCB microsection analysis guide.

A Practical Failure-Analysis Sequence

Contain the lot first, preserve evidence, then test competing explanations in a controlled sequence.

  1. Contain: identify affected lots, panels, date codes and downstream assemblies without destroying evidence.
  2. Document: save failure symptoms, inspection images, test history and the exact acceptance concern.
  3. Sample: select suspect and known-good boards across relevant panel positions and hole structures.
  4. Section: prepare representative holes with controlled orientation and record pre-stress condition.
  5. Stress: apply only an agreed test profile when comparison after thermal exposure is needed.
  6. Inspect: measure and photograph the interface, barrel, inner-layer junctions and nearby laminate.
  7. Correlate: compare findings with material lots, lamination, drilling, desmear and plating records.
  8. Correct and verify: change the confirmed contributor, then validate with a controlled rebuild.
PCB hole wall pullaway failure analysis workflow from containment through verified corrective action
A controlled workflow prevents a single micrograph from becoming an unsupported root-cause conclusion.

Need a second review of a plated-hole finding?

Send the stackup, drill table, material callout, lot history, micrographs and thermal-stress conditions. EBest Circuit can review whether the evidence supports a pullaway diagnosis and what additional data is needed before a rebuild.

Request an Engineering Review
Email the Failure Evidence

Process Conditions That Can Contribute to Pullaway

Hole wall pullaway is usually investigated as an interaction among material condition, lamination, mechanical drilling, hole-wall preparation and later thermal exposure. A list of possible causes is not a root-cause report; each candidate must be matched to records and physical evidence.

Process area Condition to investigate Evidence that helps
Incoming laminate and prepreg Material condition, storage or construction variation Material certificates, lot traceability and controlled comparison
Lamination Resin flow, cure history or local stress around the hole structure Press recipe, stack records and sections from multiple locations
Drilling Smear, roughness, heat damage or tool wear Tool count, hit count, feeds/speeds and unplated-hole inspection
Desmear and conditioning Insufficient, excessive or nonuniform wall preparation Chemistry control, dwell records and hole-wall morphology
Metallization and plating Poor initial coverage or weak interface formation Bath controls, deposition records and copper continuity
Thermal exposure Stress beyond the qualified construction or repeated excursions Assembly/rework profile, test profile and before/after sections

Correlation is essential. If the finding clusters by one drill tool, panel region or material batch, that pattern is more useful than a generic assumption. If it appears across unrelated conditions, expand the investigation rather than forcing the first theory.

How Lamination, Drilling, and Desmear Interact

The plated interface is created by a chain of processes, so an upstream condition can alter how a downstream process behaves. Lamination establishes the resin/glass structure. Drilling exposes and mechanically modifies that structure. Desmear and conditioning remove residues and prepare the wall for metallization. Copper deposition and electroplating then build the conductive barrel.

A smooth-looking finished barrel does not prove every interface step was robust. Drill heat can change the surface that desmear must treat; excessive wall attack can create a different morphology; nonuniform conditioning can affect initial copper coverage. Later thermal stress may reveal a weak interface that was not obvious in an unstressed section.

Review the chain as one system. For an overview of the finished structure, compare the finding with the through-hole circuit board guide. For thermal evaluation context, the solder float test guide explains why test conditions and post-stress sections must be documented.

What to Check in the Microsection Report

A useful report lets another engineer understand the specimen, reproduce the interpretation and compare it with the agreed requirement. Ask for:

  • board part number, revision, lot and panel or coupon location;
  • hole type, nominal finished diameter and relevant layer connections;
  • section orientation and whether the cut passes through the hole center;
  • preparation and etching condition;
  • overview and detail images with scale or magnification;
  • location and extent of each interface gap;
  • barrel, corner and inner-layer-junction observations;
  • thermal conditioning or stress history;
  • sample count and number of affected holes;
  • acceptance reference and an explicit conclusion.

If the report only shows one cropped image without lot identity or test history, treat it as a lead for investigation, not a complete disposition record.

Containment Steps Before More Boards Are Built

Containment should prevent mixing, preserve traceability and collect enough evidence for a focused decision.

  1. Pause release of the suspect lot where the product risk justifies it.
  2. Separate suspect, screened, reworked and accepted material physically and in records.
  3. Record panel, lot, material, drill and process-batch relationships.
  4. Reserve untested samples before destructive analysis consumes the available evidence.
  5. Define the inspection or test used for temporary screening and acknowledge its limits.
  6. Notify assembly or product teams if additional thermal cycles could change the evidence.
  7. Agree who has authority to accept, rework, rebuild or scrap material.

Containment is not the permanent fix. A screen that finds obvious failures may still miss latent interface weakness, so do not close the issue until the corrective action is verified.

Corrective Actions Must Follow the Confirmed Cause

Changing several process settings at once can produce a passing sample without proving which change solved the problem. Link each action to an observed cause and a measurable verification result.

Confirmed evidence Corrective-action direction Verification
Finding tracks a drill tool or wear interval Review tool life, parameters, entry/backer system and maintenance limits Controlled drill trial plus wall and plated-section comparison
Wall preparation is nonuniform Restore chemistry, agitation, dwell and loading controls Process-control data plus representative sections
Material/lamination batch correlation Review storage, layup, press cycle and material compatibility Traceable rebuild using controlled material and press records
Only excessive downstream thermal history correlates Review assembly, rework and qualification profiles Agreed thermal profile followed by section and continuity checks
Preparation artifact is confirmed Correct specimen preparation and interpretation method Repeat sections by an independent or controlled method

A verification build should isolate the intended correction where practical and preserve the same evidence chain used to diagnose the failure.

Design and RFQ Information That Improves the Review

The fastest useful supplier review starts with controlled design data and failure evidence, not only a screenshot. Send:

  • Gerber or ODB++ data and the released fabrication drawing;
  • controlled stackup and material callout;
  • NC drill files and drill table;
  • finished-hole requirements and relevant acceptance class or customer specification;
  • quantity, lot identity and affected panel positions;
  • original micrographs, not only compressed report screenshots;
  • sample preparation and thermal-stress details;
  • assembly/rework profile if the finding occurred after PCBA processing;
  • electrical symptom, field history and known-good comparison;
  • required containment timing and target rebuild date.

For a new build, mark any special coupon, microsection or thermal-test requirement in the purchase package before quotation. Requirements added after fabrication may not be represented by retained samples.

Turn a defect image into a controlled review package

EBest Circuit can review your PCB data, hole structures, inspection requirement and production quantity together. Include the evidence above so engineering can separate immediate containment from the permanent corrective action.

Submit PCB Files for a Quote
Discuss the Inspection Plan

Questions to Ask a PCB Supplier About the Finding

Ask questions that produce traceable evidence and decisions, not a generic assurance that the issue has been fixed.

  • How was the pullaway distinguished from a preparation artifact or plating void?
  • Was it present before thermal stress, after stress, or both?
  • Which lots, panels, hole sizes, tools and material batches were compared?
  • What evidence supports the proposed root cause?
  • What material is contained, and how is its status identified?
  • Which process control changed, and who approved it?
  • How will the corrective action be verified on the next build?
  • What records and samples will be retained?

If the issue is part of a broader supplier-quality investigation, use the same evidence discipline described in our guide to reducing PCB manufacturing defects.

FAQ About PCB Hole Wall Pullaway

Can hole wall pullaway be seen with visual inspection?

Usually not reliably. It is an interface feature inside a plated hole and is normally evaluated with a prepared cross-section. Surface inspection may identify a suspect area but cannot confirm the full barrel interface.

Is hole wall pullaway the same as a plating void?

No. Pullaway is separation at the copper-to-dielectric interface. A plating void is missing or discontinuous copper coverage. Both can exist in one hole, so the report must identify each morphology.

Does every pullaway indication require lot rejection?

Not automatically. Disposition depends on the governing requirement, the confirmed morphology, extent, sample evidence, associated defects, thermal history and product risk. The customer and responsible quality authority should make the documented decision.

Can microsection preparation create a false indication?

Yes. Poor support, grinding or polishing can produce edge relief and apparent gaps. Repeat preparation, additional samples and clear overview images help distinguish an artifact from a repeatable interface condition.

Should samples be checked before and after thermal stress?

When the investigation concerns thermal robustness, a controlled before/after comparison can be valuable. Record the exact conditioning and profile so the result can be interpreted and reproduced.

Can electrical testing rule out hole wall pullaway?

No. A hole may still conduct during a basic test even when an interface concern exists. Electrical results should be combined with cross-sectional and process evidence.

Is drilling always the root cause?

No. Drilling is one contributor to investigate, but material condition, lamination, hole-wall preparation, metallization and later thermal exposure can interact. Root cause requires correlation, not assumption.

What images should a supplier provide?

Ask for an overview of the full hole and detailed images of the affected interface, each with scale or magnification, specimen identity, orientation and stress condition.

What files should be sent for an engineering review?

Send fabrication data, drawing, stackup, material callout, drill files, acceptance requirements, lot traceability, original micrographs and the test or assembly thermal profile.

How is a corrective action verified?

Use a traceable rebuild or controlled trial that applies the cause-specific change, then repeat the agreed inspection and stress sequence on representative samples. A passing result without controlled inputs is weak evidence.

Final Decision Framework

A defensible decision answers four questions: Is the feature real, how widely is it present, what evidence supports the cause, and did a controlled rebuild verify the correction? If any answer is missing, keep the issue open or narrow the decision to temporary containment.

For new production, convert the lesson into explicit drawing notes, inspection requirements, sampling, retained evidence and supplier communication. That turns a one-time failure analysis into a repeatable control.

Request a PCB fabrication and failure-evidence review.

Send Gerber or ODB++, stackup, drill data, material callout, quantity, lot history, micrographs, thermal profile and required delivery date to sales@bestpcbs.com, or use the PCB quote form. EBest Circuit will review the available evidence and identify what must be confirmed before production or corrective rebuild.

You may also like

Tags:, ,
Posted in bestpcb | No Comments »