An Ethernet PCB that links reliably on a laboratory bench can still become unstable in production if the fabricated stackup, connector assembly, or test method differs from the released design. Link speed, PHY interface, isolation magnetics, connector style, PoE requirements, and the enclosure all affect how the board must be laid out, fabricated, assembled, and verified.
EBest Circuit turns customer-approved schematics and component requirements into manufacturable layouts, controlled-impedance PCBs, and assembled network boards. With in-house PCB and PCBA production, 20 years of PCBA experience, and a supply network of more than 1,000 partners, we can coordinate fabrication, component sourcing, SMT and through-hole assembly, and agreed testing under one production route. To discuss an Ethernet hardware build, contact sales@bestpcbs.com.
How Link Speed Changes Ethernet PCB Requirements
Higher Ethernet speeds leave less margin for insertion loss, crosstalk, discontinuities, and timing variation. The target speed must therefore be fixed before the stackup, magnetics, connector, and test method are released.
| Link speed | PCB impact | Build priority |
|---|---|---|
| 10 / 100M | Two active MDI pairs | Correct pair geometry and matched interface parts |
| 1G | Four bidirectional pairs | Four-pair consistency and 1G link testing |
| 2.5G-10G | Tighter loss, crosstalk, and thermal limits | Material and stackup matched to the PHY budget |
The cable-side MDI pairs are not the same as the MAC-to-PHY interface. MII, RMII, RGMII, SGMII, and other system-side interfaces use different electrical and timing rules. For example, RGMII timing depends on the selected MAC, PHY, and internal-delay settings; it should not receive a generic length-compensation rule copied from another design.
PoE adds another layer. The data rate may be correct while the board still has inadequate current capacity, magnetics rating, isolation, or thermal performance. PSE or PD role, PoE type, supply path, copper area, and expected temperature must be defined with the approved circuit.
Where Ethernet PCBs Are Used in Industrial and Embedded Equipment
Ethernet PCBs are used wherever equipment needs a stable wired link, but the board requirements change with the environment and the job performed by the port.
- Industrial controllers and gateways: PLC interfaces, HMIs, remote I/O, and edge gateways may combine Ethernet with noisy power stages, long field cables, and metal enclosures. Grounding, isolation, surge protection, and connector retention become as important as the PHY itself.
- Machine vision and IP cameras: A compact board may need high data throughput and PoE in the same interface. Connector position, heat around the PHY and power stage, and repeatable link testing are common production concerns.
- Embedded computers and test equipment: These boards often combine Ethernet with processors, memory, USB, wireless modules, and sensitive analog sections. Placement and return-current planning must prevent one interface from disturbing another.
- Switches, access points, and network appliances: Multiple ports increase pair density, power demand, connector alignment, and test coverage. The production fixture and test plan must reflect the actual port count and target speed.
Not every industrial Ethernet port uses an RJ45. Sealed M12 interfaces and single-pair Ethernet use different pin assignments, coupling arrangements, and mechanical constraints. Automotive 100BASE-T1 or 1000BASE-T1, for example, should not inherit a four-pair RJ45 layout merely because both are called Ethernet.
Ethernet PCB Layout Support Based on Customer-Approved Schematics
EBest Circuit can support PCB layout after the customer has approved the network architecture, schematic, PHY, magnetics, connector, and functional requirements. Our role is to translate those decisions into a board that can be fabricated and assembled consistently, not to replace the customer's circuit or system design authority.
- Physical signal path: Place the PHY, discrete magnetics or magjack, protection parts, and connector so the MDI pairs remain short, balanced, and free of unnecessary stubs and vias.
- Interface-specific routing: Apply the selected PHY's data sheet and reference design to the MDI path, while treating MII, RMII, RGMII, or serial MAC-side interfaces according to their own timing and impedance requirements. Detailed Ethernet PCB routing rules are reviewed against the actual device rather than copied as universal numbers.
- Reference and isolation structure: Coordinate reference planes, isolation gaps, chassis or shield connections, and any keepout beneath magnetics with the approved safety and EMC concept.
- Support circuitry: Keep the oscillator or crystal, bias resistor, decoupling network, termination, and ESD parts in the locations required by the selected components.
- Manufacturing handoff: Align the net classes and critical geometry with a producible stackup, then return material or geometry changes for approval before CAM release.
The customer remains responsible for PHY and MAC selection, circuit function, firmware, system compliance, and final product validation. This boundary keeps layout support practical without allowing production changes to alter the approved design intent.
How Stackup, Materials, and Controlled Impedance Shape Ethernet PCB Manufacturing
Controlled impedance is a property of the finished stackup, not a trace-width value in isolation. Dielectric thickness and Dk, finished copper, line width and spacing, reference planes, solder mask, and etching compensation work together to produce the result.
For an Ethernet production build, EBest Circuit can support multilayer rigid PCB fabrication from 1 to 32 layers, controlled impedance, and standard or high-Tg FR-4 options; HDI or other special structures are evaluated against the released design. FR-4 is not automatically unsuitable for a faster link, but the selected material and geometry must satisfy the PHY's actual channel-loss budget.
The manufacturing sequence should remain controlled:
- the customer defines the target impedance and tolerance for each applicable net class;
- EBest Circuit proposes a manufacturable stackup and calculates the corresponding geometry;
- the approved material family, dielectric, copper, line width, spacing, via structure, and reference planes are locked for production; and
- an impedance coupon and TDR record can be supplied when included in the order requirements.
Our impedance control PCB process can verify representative fabricated geometry, but a coupon does not prove the performance of the complete assembled Ethernet channel. Magnetics, connector transitions, soldering, firmware, cable, and link partner still require the appropriate assembly or functional test.
Ethernet PCB Assembly for PHYs, Magnetics, and Network Connectors
Ethernet PCB assembly must hold both the electronic and mechanical interfaces to the released design. A board can have correct copper and still fail if a PHY has hidden-joint defects, a connector sits unevenly, or an unapproved magnetics substitute changes bandwidth, isolation, pinout, or PoE current capacity.
- BOM and revision control: Source the exact approved PHY, oscillator, magnetics or magjack, connector, ESD device, bias and termination parts, and PoE components. Alternatives require engineering approval; matching only the package or nominal function is not enough.
- Fine-pitch assembly: Use an appropriate stencil and reflow profile for QFN, BGA, LGA, or other bottom-terminated PHY packages. SPI, AOI, and X-ray are applied where they match the package and inspection plan.
- Network connector assembly: RJ45, M12, and other ports may use SMT, through-hole, pin-in-paste, or mixed processes. The Ethernet connector PCB build must control seating height, board-edge position, shield tabs, through-hole fill, and the mechanical load transferred from the cable.
- Integrated or discrete magnetics: A magjack already contains the magnetics, while other designs place a separate transformer between the PHY and connector. The assembly route and inspection points must follow the actual architecture rather than assume both parts are present.
A typical build route is approved BOM verification, solder-paste inspection, SMT placement and reflow, AOI or X-ray as required, through-hole connector assembly, cleaning, and customer-defined testing. PoE boards also need process control for higher-current paths, power devices, isolation areas, and local heat.
Ethernet PCB Inspection and Testing for Bare Boards and PCBAs
No single test proves that an Ethernet board is ready for the end product. Each stage answers a different question, so bare-board, assembly, and link evidence must not be treated as interchangeable.
| Test process | Main fault found | Production role |
|---|---|---|
| Bare-board electrical test | Opens and shorts | Screens PCB connectivity before assembly |
| Coupon / TDR | Impedance deviation | Monitors stackup and trace geometry |
| SPI / AOI / X-ray | Paste, placement, and solder defects | Controls assembly workmanship |
| Defined link test | Power-up, negotiation, and packet faults | Exercises the agreed PCBA functions |
These methods address different production layers: electrical testing and TDR cover the fabricated PCB, inspection controls assembly workmanship, and link testing exercises the agreed PCBA functions. EBest Circuit can run customer-defined link tests using approved firmware, fixtures, link partners, and pass/fail limits. Production testing does not replace EMC, safety, PoE, or IEEE compliance validation.
How EBest Circuit Supports Ethernet PCB Prototypes and Repeat Production
EBest Circuit uses prototype builds to establish a manufacturing baseline, then carries the approved data and process into repeat production.
- Prototype build: DFM and CAM data, stackup, impedance classes, BOM, first-article inspection, and the test method are aligned before release.
- Repeat orders: Gerber or ODB++, material, stackup, approved alternatives, placement data, firmware, and test revisions remain tied to the order.
- Traceability: The digital shopfloor can locate material and product-batch records within five seconds when an engineer needs to investigate a component, revision, or lot.
- In-house execution: PCB fabrication, sourcing, mixed SMT and through-hole assembly, and final inspection follow one coordinated production route. Prototype and small-batch builds are supported.
- Quality systems: Company certifications include ISO 9001, ISO 13485, IATF 16949, and AS9100D for applicable regulated programs.
FAQs About Ethernet PCB
Does every Ethernet PCB use 100-ohm differential impedance?
Most cable-side copper Ethernet MDI pairs use the differential impedance specified by the PHY and magnetics interface, commonly 100 ohms. MAC-side interfaces, single-pair Ethernet, and vendor-specific structures may follow different requirements, so the selected device data and approved stackup remain the authority.
Can standard FR-4 support a Gigabit Ethernet PCB?
Yes, standard FR-4 is suitable for many 1G boards when the route length, stackup, geometry, and connector path stay within the PHY channel budget. Faster links or longer on-board channels may require tighter loss control or a lower-loss material.
Should the Ethernet magnetics be integrated into the RJ45 or placed separately?
Both architectures are valid. A magjack can shorten the interface path and reduce the part count, while discrete magnetics can provide more flexibility for connector choice, placement, isolation, and PoE implementation. The PCB and assembly route should follow the approved architecture and BOM.
Why can a PCB pass bare-board electrical testing but still fail Ethernet link testing?
Bare-board electrical testing finds opens and shorts; it does not exercise the assembled channel. Link failure can still come from impedance deviation, solder defects, an incorrect component, clock or power problems, PHY configuration, firmware, the connector, or the cable.
Can EBest Circuit perform Ethernet link testing before shipment?
Yes, when the firmware, fixture, link partner, target speed, active ports, and pass/fail limits are agreed before production. The test can cover power-up, link negotiation, and defined packet functions within the approved test scope.
When your schematic and interface architecture are approved, EBest Circuit can coordinate controlled-impedance PCB fabrication, sourcing, assembly, and the agreed link test. Send the released files, target quantity, and test requirements to sales@bestpcbs.com, or arrange an on-site factory audit before first articles or repeat production.
