


{"id":38786,"date":"2026-11-10T20:21:50","date_gmt":"2026-11-10T12:21:50","guid":{"rendered":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/"},"modified":"2026-11-10T20:21:50","modified_gmt":"2026-11-10T12:21:50","slug":"lvds-termination-resistor-double-load-check","status":"publish","type":"post","link":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/","title":{"rendered":"LVDS Termination Resistor: Check for a Double Load"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_89 ez-toc-wrap-left counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_point_to_point\" >lvds point to point<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_termination_resistor_value\" >lvds termination resistor value<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_receiver_termination\" >lvds receiver termination<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_termination_resistor_placement\" >lvds termination resistor placement<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_differential_impedance\" >lvds differential impedance<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_pcb_layout\" >lvds pcb layout<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_oscilloscope\" >lvds oscilloscope<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#lvds_signal_integrity\" >lvds signal integrity<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#FAQ\" >FAQ<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#Sources\" >Sources<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-11\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/lvds-termination-resistor-double-load-check\/#Project_Review\" >Project Review<\/a><\/li><\/ul><\/nav><\/div>\n<div class=\"yzp-no-index\"><\/div><p>For a conventional point-to-point LVDS link, confirm that the receiver sees one intended differential load matched to the design. An external resistor can double-terminate a receiver that already has the load built in. Check the exact part and operating configuration before changing resistor value, then verify the waveform at the receiver.<\/p>\n<figure class=\"wp-block-image\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/lvds-termination-resistor.jpg\" alt=\"Circuit-board differential traces and a small part near a receiver package\" width=\"1200\" height=\"675\" style=\"max-width:100%;height:auto;\"><figcaption>Illustrative rendering, not a reference footprint or validated routing.<\/figcaption><\/figure>\n<h2><span class=\"ez-toc-section\" id=\"lvds_point_to_point\"><\/span>lvds point to point<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>A point-to-point link has one driver and one receiver on a differential pair. The termination provides a load across the two conductors at the receiving end. Do not copy termination from CAN or a multidrop bus; the topology and component requirements differ.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"lvds_termination_resistor_value\"><\/span>lvds termination resistor value<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Start with the receiver and driver guidance and the target differential impedance. TI&#8217;s DS90LV028AQ-Q1 application guidance uses 100 \u03a9 across the receiver input pins. That is a named design example, not a rule for every LVDS receiver or variant. The resistance across the pair is not a resistance from each line to ground.<\/p>\n<figure class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Check<\/strong><\/td>\n<td><strong>Evidence<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Differential load, \u03a9<\/td>\n<td>Exact receiver and termination mode<\/td>\n<\/tr>\n<tr>\n<td>Pair impedance, \u03a9<\/td>\n<td>Target and controlled stack geometry<\/td>\n<\/tr>\n<tr>\n<td>Termination-to-pin distance<\/td>\n<td>Actual routed path and transitions<\/td>\n<\/tr>\n<tr>\n<td>Receiver waveform<\/td>\n<td>Amplitude and timing at defined conditions<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<h2><span class=\"ez-toc-section\" id=\"lvds_receiver_termination\"><\/span>lvds receiver termination<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Inspect the complete ordering part number and, for configurable devices, the active setting. TI, for example, distinguishes the DS90LV012A from the DS90LT012A, which includes an input termination. In a hypothetical design with an enabled 100 \u03a9 internal load and a 100 \u03a9 external resistor, their parallel equivalent is 50 \u03a9. Removing the external part may be appropriate after checking the actual device and topology; it is not a blanket change.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"lvds_termination_resistor_placement\"><\/span>lvds termination resistor placement<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>For an external load, keep it near the receiver inputs as the device guidance specifies. The length that matters is along the routed conductors, not the straight-line gap between component bodies. A resistor beside the connector can leave a branch or unmatched segment if the receiver is farther inland.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"lvds_differential_impedance\"><\/span>lvds differential impedance<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Termination and line impedance are related but are not the same measurement. An ohmmeter reading across a board does not measure the characteristic impedance of the traces. Review the stack and pair geometry separately. On an isolated, unpowered test board, an unexpected DC reading can help identify passive paths, but on-chip termination may not behave the same when unpowered. Consult the device data before relying on that test.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"lvds_pcb_layout\"><\/span>lvds pcb layout<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Check the route through the connector, termination pads and receiver escape. Avoid making one leg of the pair take a longer detour through a via or test pad. Where the receiver has the intended built-in termination, do not leave a long unused branch merely to preserve an optional resistor footprint.<\/p>\n<figure class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Finding<\/strong><\/td>\n<td><strong>First action<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Internal and external loads both active<\/td>\n<td>Restore one intended load and retest<\/td>\n<\/tr>\n<tr>\n<td>No effective load<\/td>\n<td>Confirm receiver option and add the specified load<\/td>\n<\/tr>\n<tr>\n<td>One correct load but persistent ringing<\/td>\n<td>Inspect position, stubs and transitions<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<h2><span class=\"ez-toc-section\" id=\"lvds_oscilloscope\"><\/span>lvds oscilloscope<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Use suitable differential probing at the receiver with enough bandwidth for the edge rate. Keep the same pattern, fixture and probe location before and after the change. A slow or heavy probe can hide or create the problem. Capture the differential waveform and check common-mode behavior separately when the receiver requires it.<\/p>\n<figure class=\"wp-block-image\"><img decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/lvds-oscilloscope.jpg\" alt=\"Oscilloscope and differential probe beside a small PCB\" width=\"1200\" height=\"675\" style=\"max-width:100%;height:auto;\" loading=\"lazy\"><figcaption>Illustrative rendering of a test bench, not a waveform or compliance result.<\/figcaption><\/figure>\n<h2><span class=\"ez-toc-section\" id=\"lvds_signal_integrity\"><\/span>lvds signal integrity<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>If the duplicate load was removed, compare receiver amplitude, ringing and timing with the approved limits at the intended operating conditions. If the waveform is still poor, inspect the connector, stubs and transitions rather than trying unrelated resistor values. For the uniform trace geometry, see the <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/09\/lvds-pcb-example-100-ohm-differential-impedance-routing\/\">BestPCBs LVDS routing example<\/a>.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"FAQ\"><\/span>FAQ<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<h3>Are two 100 \u03a9 loads equivalent to one 100 \u03a9 load?<\/h3>\n<p>No. Two ideal 100 \u03a9 loads in parallel give 50 \u03a9.<\/p>\n<h3>Can the transmitter and receiver both be terminated?<\/h3>\n<p>Only if the chosen topology and device specifications call for it. Do not add a second termination to a conventional single-receiver link by default.<\/p>\n<h3>Does a resistor near the connector count as receiver termination?<\/h3>\n<p>Only if the actual path makes it the appropriate load near the receiving end. Check the route to the receiver pins.<\/p>\n<h3>Do I read trace impedance with a resistance meter?<\/h3>\n<p>No. A resistance meter can help identify passive loads but does not measure transmission-line impedance.<\/p>\n<h3>What if termination is configurable in firmware?<\/h3>\n<p>Check the reset state and operating mode, and verify that the setting is active during the measurement.<\/p>\n<h3>Can a clean transmitter waveform approve the link?<\/h3>\n<p>No. Check at the receiver where reflections, attenuation and timing determine whether the link works.<\/p>\n<h3>Can I use this rule for AC-coupled LVDS?<\/h3>\n<p>Use the actual device and bias guidance. An AC-coupled receiver may require a different bias and termination arrangement.<\/p>\n<h3>Should a test pad be added for the probe?<\/h3>\n<p>Use an approved probing arrangement. An asymmetric or long test branch can change the signal you are trying to observe.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Sources\"><\/span>Sources<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p><a href=\"https:\/\/www.ti.com\/lit\/ug\/slld009\/slld009.pdf\">TI LVDS application handbook<\/a>; <a href=\"https:\/\/www.ti.com\/lit\/ds\/symlink\/ds90lv028aq-q1.pdf\">TI DS90LV028AQ-Q1 application guidance<\/a>; <a href=\"https:\/\/www.ti.com\/product\/DS90LV012A\">TI DS90LV012A and related termination option<\/a>.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Project_Review\"><\/span>Project Review<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>For a Best Technology PCB fabrication discussion, send the stackup, differential pair requirements and receiver routing at <a href=\"mailto:sales@bestpcbs.com\">sales@bestpcbs.com<\/a>.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Find a double-terminated LVDS receiver before changing the PCB. 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