{"id":38681,"date":"2026-11-09T16:19:25","date_gmt":"2026-11-09T08:19:25","guid":{"rendered":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/"},"modified":"2026-11-09T16:23:35","modified_gmt":"2026-11-09T08:23:35","slug":"pcb-propagation-delay-guide","status":"publish","type":"post","link":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/","title":{"rendered":"PCB Trace Delay"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_89 ez-toc-wrap-left counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/#pcb_propagation_delay_formula\" >pcb propagation delay formula<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/#pcb_propagation_delay_per_mm\" >pcb propagation delay per mm<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/#fr4_pcb_propagation_delay\" >fr4 pcb propagation delay<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/#pcb_propagation_delay_calculator\" >pcb propagation delay calculator<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/#FAQ\" >FAQ<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-propagation-delay-guide\/#Discuss_Your_Project\" >Discuss Your Project<\/a><\/li><\/ul><\/nav><\/div>\n<div class=\"yzp-no-index\"><\/div><p>PCB propagation delay is the one-way time a signal takes to travel along a trace. For an initial estimate, multiply each trace segment\u2019s length by its delay per unit length. Do not use one FR-4 constant for every layer: an outer-layer microstrip and an inner-layer stripline can have different delay rates even when their physical lengths match.<\/p>\n<p>Suppose two signals must reach a receiver within a tight timing window. Equal lengths can look good in the PCB editor while the actual paths have different electrical delays. The useful comparison is in picoseconds at agreed reference planes, not just millimeters.<\/p>\n<figure><img fetchpriority=\"high\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/pcb-trace-delay-coupon.jpg\" alt=\"Bare PCB coupon with straight copper test traces\" width=\"1120\" height=\"630\" style=\"max-width:100%;height:auto;\" loading=\"eager\"><figcaption>Each routing structure needs its own delay estimate. AI-generated illustration; not a coupon design.<\/figcaption><\/figure>\n<h2><span class=\"ez-toc-section\" id=\"pcb_propagation_delay_formula\"><\/span>pcb propagation delay formula<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>For a uniform, low-dispersion transmission line, estimate the one-way delay as <strong>t \u2248 L\u221a\u03b5<sub>eff<\/sub>\/c<\/strong>. Here <strong>L<\/strong> is trace length, <strong>\u03b5<sub>eff<\/sub><\/strong> is dimensionless effective relative permittivity, and <strong>c<\/strong> is about 299.792 mm\/ns. The formula returns nanoseconds when length is in millimeters. For a route with several uniform structures, estimate each segment separately and sum the delays.<\/p>\n<figure class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Input<\/strong><\/td>\n<td><strong>Unit<\/strong><\/td>\n<td><strong>Use<\/strong><\/td>\n<\/tr>\n<tr>\n<td>L<\/td>\n<td>mm<\/td>\n<td>Length of each segment<\/td>\n<\/tr>\n<tr>\n<td>\u03b5<sub>eff<\/sub><\/td>\n<td>None<\/td>\n<td>Line model<\/td>\n<\/tr>\n<tr>\n<td>Speed of light<\/td>\n<td>mm\/ns<\/td>\n<td>299.792<\/td>\n<\/tr>\n<tr>\n<td>Delay rate<\/td>\n<td>ps\/mm<\/td>\n<td>Rate \u00d7 L<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<p><a href=\"https:\/\/www.ti.com\/lit\/an\/scaa082a\/scaa082a.pdf\">Texas Instruments\u2019 high-speed layout guide<\/a> uses effective permittivity when comparing microstrip and stripline. Its example is a specific stackup, not an FR-4 rule. The approximation here also does not include connectors, package delay or a separate delay contribution from a via or launch.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"pcb_propagation_delay_per_mm\"><\/span>pcb propagation delay per mm<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>In the simple model, the delay rate is about 3.336\u221a\u03b5<sub>eff<\/sub> ps\/mm. Multiply a ps\/mm value by 25.4 to express it in ps\/in. Compare the rates using the same units and without rounding too early, especially when converting a short timing budget into allowable length mismatch.<\/p>\n<figure class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Model<\/strong><\/td>\n<td><strong>ps\/mm<\/strong><\/td>\n<td><strong>ps\/in<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Microstrip (3.0)<\/td>\n<td>5.78<\/td>\n<td>146.75<\/td>\n<\/tr>\n<tr>\n<td>Stripline (4.0)<\/td>\n<td>6.67<\/td>\n<td>169.45<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<p>At 80 mm, those two example lines take approximately 462.2 ps and 533.7 ps. Equal lengths leave about 71.5 ps difference before package and transition contributions. These are modeled values, not universal measurements or recommended limits. In a real board, use the stackup and trace model agreed for the applicable layer, not the example\u2019s assumed values.<\/p>\n<figure><img decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/pcb-delay-lab-bench.jpg\" alt=\"PCB test coupon and coax cables on a measurement bench\" width=\"1120\" height=\"630\" style=\"max-width:100%;height:auto;\" loading=\"lazy\"><figcaption>Define the measurement reference planes before comparing delay. AI-generated illustration; no measured results are shown.<\/figcaption><\/figure>\n<h2><span class=\"ez-toc-section\" id=\"fr4_pcb_propagation_delay\"><\/span>fr4 pcb propagation delay<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>FR-4 is a material designation, not a single line velocity. A microstrip\u2019s fields extend into more than one medium; laminate Dk, solder mask, trace width and height above the reference plane can all matter to the effective value. A homogeneous stripline approximation can use the surrounding dielectric value as a starting point, but mixed or asymmetric constructions still require a suitable model.<\/p>\n<h3>Microstrip vs. stripline for timing<\/h3>\n<p>When possible, route signals that must track each other through equivalent structures. If a layer change is unavoidable, ask for the relevant pressed thicknesses, material data and geometry so the solver can estimate delay by layer. Do not change to a different material solely to match the estimated velocity without also checking impedance, loss and manufacturing constraints.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"pcb_propagation_delay_calculator\"><\/span>pcb propagation delay calculator<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Use a calculator only after choosing the units, reference planes and delay model. List every trace segment with its own delay rate; add a modeled or measured transition and package contribution if the timing budget includes those structures. Compare the complete path delays, not just their track-length totals.<\/p>\n<ol>\n<li>Decide whether the budget is for the bare board or the complete path to the device pins.<\/li>\n<li>Check the routing layers and divide mixed paths into uniform segments.<\/li>\n<li>Calculate with full precision, sum, then round the result for reporting.<\/li>\n<li>If the margin is small, confirm the model against a suitable coupon or measurement with agreed reference planes.<\/li>\n<\/ol>\n<p>For a 50 mm outer segment at 5.7775 ps\/mm and a 30 mm inner segment at 6.6713 ps\/mm, the estimated trace-only delay is about 489.0 ps. Compare that with 462.2 ps for the 80 mm all-outer route: the same total length still leaves about 26.8 ps of difference. Add transition effects separately if the budget includes them.<\/p>\n<p>A reflection on a TDR time axis includes travel out and back; that interval is not the one-way flight time used here. The <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/pcb-tdr-fault-distance-round-trip\/\">TDR fault distance guide<\/a> covers the separate round-trip conversion. Keep its time convention out of an end-to-end timing budget.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"FAQ\"><\/span>FAQ<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<h3>Is propagation delay the same thing as impedance?<\/h3>\n<p>No. Impedance describes the voltage-to-current relationship of a traveling wave in the line; propagation delay describes travel time. A routing change can affect both, but matching nominal impedance alone does not guarantee equal delay. Evaluate each against its own requirement using the actual routing structure.<\/p>\n<h3>Should I use 150 ps\/in for every FR-4 trace?<\/h3>\n<p>Use a rule of thumb for a quick feasibility screen, not as a final budget for every layer. A mask-covered outer trace and an inner trace can have different delay rates. Ask for a stackup-specific model when the difference matters to receiver timing or routing decisions.<\/p>\n<h3>Does equal PCB length guarantee that two signals arrive together?<\/h3>\n<p>Only if the paths have comparable delay per unit length and comparable contributions from transitions and packages. A board editor can report equal trace lengths for electrically different structures. Compare estimated time from the relevant launch to the relevant receiver plane before declaring the paths matched.<\/p>\n<h3>Do I include the device package delay in length tuning?<\/h3>\n<p>Include it when the timing requirement is defined at internal device reference points or when the component vendor specifies a package compensation model. If the budget is only for board connections, report package delay separately. Define the endpoint convention before adding package length or time to PCB results.<\/p>\n<h3>How does a via enter a propagation-delay budget?<\/h3>\n<p>Its effect is not always captured by adding the board thickness to the planar length. The transition includes a three-dimensional field and may add phase, loss and reflections. Use a suitable via model or measurement when the margin is small, and state whether the estimate includes that contribution.<\/p>\n<h3>Can a faster rise time change which delay estimate I should use?<\/h3>\n<p>A faster edge contains more high-frequency content. If the channel is dispersive, a single low-frequency delay may not describe the edge shape or timing of interest. Use an appropriate bandwidth and measurement definition rather than treating the simple low-dispersion model as exact at every frequency.<\/p>\n<h3>Should I measure a connector and trace together?<\/h3>\n<p>Measure them together if the requirement is for the complete interconnect. If you are trying to isolate the trace, use reference structures or agreed fixture removal to define the trace endpoints. Document which launch, cable or adapter contributions remain so another engineer can compare the results fairly.<\/p>\n<h3>How should I convert a skew budget into a length tolerance?<\/h3>\n<p>For two comparable uniform paths, divide the allowed time difference by the relevant delay per unit length. Do not use that shortcut across dissimilar structures without segment modeling. Apply package and transition allowances first if those contributions belong to the system\u2019s budget.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Discuss_Your_Project\"><\/span>Discuss Your Project<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Send Best Technology the proposed stackup, routing layers, length or delay targets and timing reference points. Flag any planned layer changes or connector launches that need to be considered in the board review. Contact <a href=\"mailto:sales@bestpcbs.com\">sales@bestpcbs.com<\/a>.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Calculate PCB propagation delay in ps\/mm or ps\/in, compare microstrip with stripline, and find out when matching trace length will not match time.<\/p>\n","protected":false},"author":32827,"featured_media":38679,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_uf_show_specific_survey":0,"_uf_disable_surveys":false,"footnotes":""},"categories":[174],"tags":[9243,9242,8099,9244],"class_list":["post-38681","post","type-post","status-publish","format-standard","hentry","category-bestpcb","tag-microstrip","tag-propagation-delay","tag-signal-integrity","tag-stripline"],"acf":[],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.4 - aioseo.com -->\n\t<meta name=\"description\" content=\"Calculate PCB propagation delay in ps\/mm or ps\/in, compare microstrip with stripline, and find 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