{"id":38552,"date":"2026-11-06T19:58:37","date_gmt":"2026-11-06T11:58:37","guid":{"rendered":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/"},"modified":"2026-11-06T19:58:37","modified_gmt":"2026-11-06T11:58:37","slug":"rf-pcb-phase-matching-delay-budget","status":"publish","type":"post","link":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/","title":{"rendered":"RF PCB Phase Matching: Turn Degrees Into a Delay Budget"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_89 ez-toc-wrap-left counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#What_phase_matching_means_on_a_PCB\" >What phase matching means on a PCB<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#What_to_put_in_the_requirement\" >What to put in the requirement<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#Convert_a_phase_limit_to_time\" >Convert a phase limit to time<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#Estimate_the_corresponding_routing_mismatch\" >Estimate the corresponding routing mismatch<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#Physical_length_vs_phase_delay_vs_group_delay\" >Physical length vs phase delay vs group delay<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#Why_equal_lengths_can_still_differ\" >Why equal lengths can still differ<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#What_changes_across_a_frequency_band\" >What changes across a frequency band<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#How_to_allocate_the_total_budget\" >How to allocate the total budget<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#What_the_reference_planes_should_include\" >What the reference planes should include<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#How_to_measure_a_path_pair\" >How to measure a path pair<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-11\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#What_to_check_before_adding_a_meander\" >What to check before adding a meander<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-12\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#What_to_release_with_the_PCB_files\" >What to release with the PCB files<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-13\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/rf-pcb-phase-matching-delay-budget\/#FAQ\" >FAQ<\/a><\/li><\/ul><\/nav><\/div>\n<div class=\"yzp-no-index\"><\/div><p>Two RF paths are phase-matched when their relative phase at defined reference planes stays within a specified limit over the relevant frequency band. Start by converting the phase limit to delay at each frequency, then include routing, launches and component tolerances. Equal drawn lengths alone do not guarantee equal phase.<\/p>\n<figure><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/rf-phase-paths.jpg\" width=\"1120\" height=\"630\" style=\"max-width:100%;height:auto\" alt=\"RF evaluation board with separate trace paths\"><figcaption>RF evaluation board with separate trace paths. AI-generated illustration, not a measurement or production record.<\/figcaption><\/figure>\n<h2><span class=\"ez-toc-section\" id=\"What_phase_matching_means_on_a_PCB\"><\/span>What phase matching means on a PCB<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Phase is position within a signal cycle, expressed in degrees. For two paths carrying the same tone, compare their phases at the chosen output references after accounting for their inputs. The requirement can be equal phase or a defined offset.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_to_put_in_the_requirement\"><\/span>What to put in the requirement<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Specify the two paths, the measurement planes and the intended frequency band before setting a length tolerance.<\/p>\n<figure class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Field<\/strong><\/td>\n<td><strong>Unit or definition<\/strong><\/td>\n<td><strong>Example only<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Test frequency<\/td>\n<td>GHz<\/td>\n<td>6.0<\/td>\n<\/tr>\n<tr>\n<td>Allowed relative phase error<\/td>\n<td>Degrees<\/td>\n<td>\u00b13<\/td>\n<\/tr>\n<tr>\n<td>Target relative phase<\/td>\n<td>Degrees<\/td>\n<td>0<\/td>\n<\/tr>\n<tr>\n<td>Effective permittivity<\/td>\n<td>Dimensionless<\/td>\n<td>3.0 for an illustrative uniform line<\/td>\n<\/tr>\n<tr>\n<td>Reference planes<\/td>\n<td>Defined interfaces<\/td>\n<td>Input and output launch boundaries<\/td>\n<\/tr>\n<tr>\n<td>Test state<\/td>\n<td>Condition and setup<\/td>\n<td>Same temperature and matched ports<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<h2><span class=\"ez-toc-section\" id=\"Convert_a_phase_limit_to_time\"><\/span>Convert a phase limit to time<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>For a pure delay difference, phase magnitude in degrees is 360 times frequency in hertz times delay in seconds. At 6 GHz, 3 degrees corresponds to about 1.39 ps. This budget is for the total path difference at that frequency, not the portion reserved for PCB routing.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Estimate_the_corresponding_routing_mismatch\"><\/span>Estimate the corresponding routing mismatch<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>For an illustrative uniform line with effective permittivity 3.0, phase velocity is about 173 mm\/ns. Multiplying by 0.00139 ns gives about 0.24 mm. Use that as a screening estimate only; different layers, dispersive structures or launches need a better model.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Physical_length_vs_phase_delay_vs_group_delay\"><\/span>Physical length vs phase delay vs group delay<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>These quantities answer different questions.<\/p>\n<figure class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Quantity<\/strong><\/td>\n<td><strong>What it describes<\/strong><\/td>\n<td><strong>What can change it<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Physical length<\/td>\n<td>Drawn or manufactured conductor distance<\/td>\n<td>Routing geometry<\/td>\n<\/tr>\n<tr>\n<td>Phase at a tone<\/td>\n<td>Relative angular shift at one frequency<\/td>\n<td>Electrical length and discontinuities<\/td>\n<\/tr>\n<tr>\n<td>Group delay<\/td>\n<td>Negative slope of unwrapped phase with angular frequency<\/td>\n<td>Frequency-dependent behavior across the band<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<\/figure>\n<h2><span class=\"ez-toc-section\" id=\"Why_equal_lengths_can_still_differ\"><\/span>Why equal lengths can still differ<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Different layers and reference geometries can change propagation. Different via transitions, launches or component footprints can add phase error even when the planar routes measure the same. Compare both complete signal paths, not only the longest straight traces.<\/p>\n<figure><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/rf-phase-vna-fixture.jpg\" width=\"1120\" height=\"630\" style=\"max-width:100%;height:auto\" alt=\"Vector network analyzer beside an RF fixture\"><figcaption>Vector network analyzer beside an RF fixture. AI-generated illustration, not a measurement or production record.<\/figcaption><\/figure>\n<h2><span class=\"ez-toc-section\" id=\"What_changes_across_a_frequency_band\"><\/span>What changes across a frequency band<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Pure delay produces phase error proportional to frequency. Real paths may also show phase curvature because their behavior varies with frequency. A single point inside the limit does not establish a wideband match; sweep the full requirement and use consistent phase unwrapping.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"How_to_allocate_the_total_budget\"><\/span>How to allocate the total budget<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Keep separate allowances for the PCB routing, launches, connector or component variation and measurement uncertainty. In a worst-case budget the signed contributions can add unfavorably. Use a statistical combination only if the assumptions and evidence support it.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_the_reference_planes_should_include\"><\/span>What the reference planes should include<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>A system specification may include connector phase, while a board coupon test may remove the fixture. Choose the boundary before comparing results. <a href=\"https:\/\/helpfiles.keysight.com\/csg\/m9485a\/tutorials\/comparing_the_pna_delay_functions.htm\">Keysight&#8217;s guide to network analyzer delay functions<\/a> distinguishes group delay, electrical delay and port extension; record which function was used so the results are reproducible.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"How_to_measure_a_path_pair\"><\/span>How to measure a path pair<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Measure each path under the same calibrated setup, with stable cables and corresponding port terminations. Compare unwrapped transmission phase across the band and report the difference with the target offset. Repeat connections where fixture repeatability could consume the allowance.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_to_check_before_adding_a_meander\"><\/span>What to check before adding a meander<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Verify which section causes the phase difference. Adding length may help a delay mismatch, but it will not necessarily correct a frequency-dependent launch issue. Tight tuning segments can change coupling, so validate the actual routed geometry rather than adding a generic serpentine.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_to_release_with_the_PCB_files\"><\/span>What to release with the PCB files<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Include the frequency band, phase target and allowable error, exact layer stack, reference-plane definitions and test conditions. For context see the <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/10\/pcb-trace-length-matching\/\">PCB trace length matching guide<\/a>. Send fabrication and coupon requirements to Best Technology at <a href=\"mailto:sales@bestpcbs.com\">sales@bestpcbs.com<\/a>.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"FAQ\"><\/span>FAQ<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<h3>Is a \u00b13-degree limit always equal to \u00b11.39 ps?<\/h3>\n<p>No. That conversion applies to a pure delay error at 6 GHz. At other frequencies the same phase angle corresponds to a different delay. If the limit applies across a band, perform the conversion at the relevant frequencies and check the measured response.<\/p>\n<h3>Do two 50-ohm traces necessarily have the same phase?<\/h3>\n<p>No. Impedance and propagation delay are different characteristics. Two structures may have the same nominal impedance while using different dielectric geometries or materials. Compare electrical length and the complete path response rather than treating the impedance callout as a phase requirement.<\/p>\n<h3>Can I use the laminate&#8217;s bulk dielectric constant directly?<\/h3>\n<p>Not for every line structure. A surface trace can have fields in both substrate and surrounding media. Use an effective propagation value appropriate to the line geometry and band, or a validated field solution. Label any assumed value in the calculation.<\/p>\n<h3>What is phase wrapping?<\/h3>\n<p>An instrument can display phase within a fixed angular interval, making a continuous trace jump by 360 degrees at the boundary. Apply a consistent unwrapping and reference convention before interpreting delay or comparing trends. Retain the original data for review.<\/p>\n<h3>Does matching at center frequency prove broadband matching?<\/h3>\n<p>No. Two paths can cross at one frequency and differ on either side. Compare the full specified band and inspect phase slope or ripple when needed. In a broadband design, the useful evidence is the response under the actual test conditions.<\/p>\n<h3>Why do repeated measurements sometimes disagree?<\/h3>\n<p>Cable motion, connector torque, calibration drift and fixture repeatability can change phase. Repeat the measurement with stable setup conditions and record any reconnection. If measurement variation is comparable to the allowance, improve the setup before drawing a design conclusion or changing the routing.<\/p>\n<h3>Can unequal line lengths produce a desired phase offset?<\/h3>\n<p>Yes, over a defined design range, but verify the frequency dependence. A fixed additional delay does not generally produce a constant nonzero phase across a broad band. Define whether the specification is an angle at a tone or a delay or response across a band.<\/p>\n<h3>Should I put the entire phase allowance into trace length?<\/h3>\n<p>No. The complete paths can include launches, transitions and parts, and the verification itself has uncertainty. Allocate an explicit portion to routing, then check the complete path against the requirement. Reserve margin for manufacturing and test variability supported by evidence.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Convert an RF PCB phase-matching limit into delay and length budgets, then verify the complete path across the specified frequency band.<\/p>\n","protected":false},"author":32827,"featured_media":38550,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"_uf_show_specific_survey":0,"_uf_disable_surveys":false,"footnotes":""},"categories":[174],"tags":[9164,9163,413,9165],"class_list":["post-38552","post","type-post","status-publish","format-standard","hentry","category-bestpcb","tag-electrical-length","tag-phase-matching","tag-rf-pcb","tag-vna"],"acf":[],"aioseo_notices":[],"aioseo_head":"\n\t\t<!-- All in One SEO 5.0.4 - aioseo.com -->\n\t<meta name=\"description\" content=\"Convert an RF PCB phase-matching limit into delay and length budgets, then verify the complete path across the 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