


{"id":38281,"date":"2026-11-04T11:10:50","date_gmt":"2026-11-04T03:10:50","guid":{"rendered":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/"},"modified":"2026-11-04T11:10:50","modified_gmt":"2026-11-04T03:10:50","slug":"dupont-pyralux-lf0111","status":"publish","type":"post","link":"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/","title":{"rendered":"Dupont Pyralux LF0111 Bond Ply for Multilayer Flex PCBs"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_89 ez-toc-wrap-left counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#Where_Does_LF0111_Go_in_a_Flex_PCB_Stackup\" >Where Does LF0111 Go in a Flex PCB Stackup?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#What_Are_the_LF0111_Material_Specifications\" >What Are the LF0111 Material Specifications?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#How_Does_Adhesive_Fill_Around_Copper_Traces\" >How Does Adhesive Fill Around Copper Traces?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#How_Thick_Is_LF0111_After_Lamination\" >How Thick Is LF0111 After Lamination?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#LF0111_Bond_Ply_vs_LF0110_Coverlay\" >LF0111 Bond Ply vs LF0110 Coverlay<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#What_Lamination_Conditions_Does_DuPont_List\" >What Lamination Conditions Does DuPont List?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#How_Can_You_Check_the_Bonded_Interface\" >How Can You Check the Bonded Interface?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#How_Should_LF0111_Be_Stored\" >How Should LF0111 Be Stored?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#What_Affects_the_Price_of_an_LF0111_Flex_PCB\" >What Affects the Price of an LF0111 Flex PCB?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/#How_Should_LF0111_Be_Called_Out_on_a_Drawing\" >How Should LF0111 Be Called Out on a Drawing?<\/a><\/li><\/ul><\/nav><\/div>\n<div class=\"yzp-no-index\"><\/div><p><a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/\">Dupont Pyralux LF0111<\/a> bonds two etched circuit layers together. It consists of a 25 \u00b5m Kapton\u00ae polyimide film with 25 \u00b5m of B-staged modified acrylic adhesive on each side. The two adhesive faces fill around the facing copper patterns during lamination, while the central film provides a continuous dielectric barrier. The copper belongs to the adjoining circuit layers; LF0111 itself contains no foil.<\/p>\n\n<div class=\"wp-block-image\"><figure class=\"aligncenter\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/dupont-pyralux-lf0111-hero.jpg\" alt=\"Flex circuit with component termination areas joined by a flexible section\" width=\"600\" height=\"568\"\/><\/figure><\/div>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"Where_Does_LF0111_Go_in_a_Flex_PCB_Stackup\"><\/span>Where Does LF0111 Go in a Flex PCB Stackup?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>Place LF0111 between two patterned faces that need to be bonded and electrically isolated. In a <a href=\"https:\/\/www.bestpcbs.com\/products\/multi-layer-pcb.htm\">multilayer PCB<\/a>, each adhesive face contacts a separate circuit layer. That lets one bond ply encapsulate both etched patterns. A copper-clad core such as <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf8515\/\">Pyralux LF8515R<\/a> serves a different purpose: it supplies foil for forming traces.<\/p>\n\n<p>For a <a href=\"https:\/\/www.bestpcbs.com\/products\/rigid-flex.htm\">rigid-flex board<\/a>, mark the areas where the layers must be bonded and any area intended to flex with separate, unbonded leaves. Extending the bond ply across that free-flex region changes how the leaves move. A layer list alone cannot show where the bond boundary falls; put the outline on the mechanical drawing.<\/p>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"What_Are_the_LF0111_Material_Specifications\"><\/span>What Are the LF0111 Material Specifications?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>DuPont identifies LF0111 by name in Tables 1 and 2 of its <a href=\"https:\/\/insulectro.com\/wp-content\/uploads\/2021\/09\/EI-10116-Pyralux-LF-BP-Data-Sheet.pdf\">Pyralux LF Bond Ply datasheet (EI-10116)<\/a>. Table 1 describes the material construction. Table 2 gives typical laboratory measurements for LF0111. Use the test frequency and method alongside the value when comparing materials.<\/p>\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Feature or property<\/th><th>LF0111 value<\/th><th>Condition or interpretation<\/th><\/tr><\/thead><tbody><tr><td>Adhesive \/ Kapton \/ adhesive<\/td><td>25 \/ 25 \/ 25 \u00b5m (1 \/ 1 \/ 1 mil)<\/td><td>Nominal incoming layers; count both adhesive faces.<\/td><\/tr><tr><td>Dielectric constant (Dk)<\/td><td>3.6 at 1 MHz; 3.0 at 10 GHz<\/td><td>IPC-TM-650 2.5.5.3 at 1 MHz; ASTM D2520 at 10 GHz.<\/td><\/tr><tr><td>Loss tangent (Df)<\/td><td>0.020 at 1 MHz; 0.017 at 10 GHz<\/td><td>Same respective test methods as Dk.<\/td><\/tr><tr><td>Adhesive flow<\/td><td>0.05\u20130.10 mm<\/td><td>Typical test result under IPC-TM-650 2.3.17.1.<\/td><\/tr><tr><td>Peel strength to copper<\/td><td>1.8 N\/mm as received; 1.6 N\/mm after solder<\/td><td>IPC-TM-650 2.4.9 on a prepared copper specimen.<\/td><\/tr><\/tbody><\/table><\/figure>\n\n<div class=\"wp-block-image\"><figure class=\"aligncenter\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/dupont-pyralux-lf0111-construction.jpg\" alt=\"Three incoming LF0111 layers, each 25 micrometers thick\" width=\"600\" height=\"470\"\/><\/figure><\/div>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"How_Does_Adhesive_Fill_Around_Copper_Traces\"><\/span>How Does Adhesive Fill Around Copper Traces?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>Before pressing, the raised copper traces touch the bond ply first. Between traces, the exposed substrate lies lower. As the adhesive heats and flows, some of it fills that relief. A sparsely routed area and an adjacent solid plane can therefore place different demands on the same adhesive face. The opposite face encounters its own copper pattern.<\/p>\n\n<p>Show both facing artwork layers and the copper thickness at bonding. If an adhesive edge lies near an exposed pad, also dimension the area that must stay clear. The datasheet\u2019s flow test gives a comparison value under a defined method. Using 0.10 mm as a universal pad setback would skip the effects of local copper distribution and the actual press process.<\/p>\n\n<div class=\"wp-block-image\"><figure class=\"aligncenter\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/dupont-pyralux-lf0111-pattern-fill.jpg\" alt=\"Facing trace patterns and both adhesive faces before pressing\" width=\"600\" height=\"470\"\/><\/figure><\/div>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"How_Thick_Is_LF0111_After_Lamination\"><\/span>How Thick Is LF0111 After Lamination?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>Adding the three incoming layers gives a nominal 3 mil, or about 75 \u00b5m using the rounded metric values in the datasheet. To see why that number cannot specify every finished gap, consider two locations on the same board: one where wide copper features face each other, and one where a trace faces an etched opening. The amount of adhesive needed beside the copper differs, as does the pair of surfaces from which you would measure.<\/p>\n\n<p>If an <a href=\"https:\/\/www.bestpcbs.com\/products\/impedance-control-pcb.htm\">impedance-controlled PCB<\/a> requires a particular trace-to-plane spacing, identify those two copper surfaces on the cross-section. Give the target, tolerance and measurement location. The fabricator can then model the cured stackup and agree on a representative coupon. A nominal bond-ply thickness and a frequency-specific Dk are inputs to that review; neither establishes the impedance of a finished trace.<\/p>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"LF0111_Bond_Ply_vs_LF0110_Coverlay\"><\/span>LF0111 Bond Ply vs LF0110 Coverlay<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>Both codes include Kapton film and modified acrylic adhesive. The decisive difference is the second adhesive face. DuPont\u2019s <a href=\"https:\/\/insulectro.com\/wp-content\/uploads\/2021\/09\/EI-10118-Pyralux-LF-CL-Data-Sheet.pdf\">LF coverlay datasheet, Table 1<\/a> identifies LF0110 as 25 \u00b5m of film with 25 \u00b5m of adhesive on one face. Substituting it between etched layers would leave one interface without the specified adhesive.<\/p>\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Drawing requirement<\/th><th>LF0111 bond ply<\/th><th>LF0110 coverlay<\/th><\/tr><\/thead><tbody><tr><td>Layer sequence<\/td><td>Adhesive \/ polyimide \/ adhesive<\/td><td>Polyimide \/ adhesive<\/td><\/tr><tr><td>Where it belongs<\/td><td>Between circuit details that must bond<\/td><td>On an outside circuit face, with film facing outward<\/td><\/tr><tr><td>Nominal sum before pressing<\/td><td>75 \u00b5m (3 mil)<\/td><td>50 \u00b5m (2 mil)<\/td><\/tr><tr><td>Artwork to supply<\/td><td>Bonded area, cutouts and any no-bond region<\/td><td>Pad and contact openings, edge clearances<\/td><\/tr><\/tbody><\/table><\/figure>\n\n<div class=\"wp-block-image\"><figure class=\"aligncenter\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/11\/dupont-pyralux-lf0111-bond-ply-coverlay-comparison.jpg\" alt=\"LF0111 has two adhesive faces and LF0110 coverlay has one\" width=\"600\" height=\"470\"\/><\/figure><\/div>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"What_Lamination_Conditions_Does_DuPont_List\"><\/span>What Lamination Conditions Does DuPont List?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>DuPont lists typical LF processing ranges of 182\u2013199 \u00b0C part temperature, 14\u201328 kg\/cm\u00b2 pressure (200\u2013400 psi) and one to two hours at temperature. The dwell refers to time at part temperature. A press platen reaching its setpoint does not by itself establish that the center of the stack has reached the same temperature.<\/p>\n\n<p>For example, the peel-test footnote specifies a narrower setup: 182 \u00b0C, 200 psi and one hour, bonded to the treated side of 1 oz rolled-annealed copper. That footnote explains the peel specimen. The manufacturing cycle for a different layup should be qualified for that stack, copper surface and press equipment.<\/p>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"How_Can_You_Check_the_Bonded_Interface\"><\/span>How Can You Check the Bonded Interface?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>Choose a section through a feature that exercises the bond: for example, a broad copper region next to isolated traces or the edge of a cutout near a pad. A cross-section there can show whether adhesive filled the trace shoulders, whether a void remains, and whether material entered a keep-clear area. Mark the inspection location before lamination so the sample corresponds to the feature of interest.<\/p>\n\n<p>If the application requires a peel test, define the specimen, foil treatment, conditioning and acceptance limit separately. A passing cross-section does not supply a peel-force result. Likewise, a datasheet peel value for treated copper does not verify bonding to a different surface on a finished board.<\/p>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"How_Should_LF0111_Be_Stored\"><\/span>How Should LF0111 Be Stored?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>DuPont specifies original packaging, 4\u201329 \u00b0C and less than 70% relative humidity. Keep the material dry and protected and avoid freezing. Preserve the package label so the material code, batch and quantity can be tied to the production job.<\/p>\n\n<p>The datasheet ties its stated two-year warranty period to the date on the Certificate of Analysis, subject to the storage conditions. For material transferred from a partial roll, retain the original lot reference and handling record. Warehouse receipt date alone does not establish the certificate date or the roll\u2019s storage history.<\/p>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"What_Affects_the_Price_of_an_LF0111_Flex_PCB\"><\/span>What Affects the Price of an LF0111 Flex PCB?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>An LF0111 roll price and the price of a finished circuit cover different things. When we estimate board cost, we look at how many circuits fit on a production panel. A narrow bonded strip on each finished board can still require a panel-sized sheet during processing. The bonded outline, number of bonded interfaces, ordered board quantity and any sectioning or test coupons affect how much material and production work are needed.<\/p>\n\n<p>For a prototype run, the same cross-section coupon costs more per delivered board when fewer boards share the panel. For a repeat run, compare the approved material code, coupon requirements and quantity with the previous order before using its unit cost. Confirm availability for the order. A datasheet listing alone does not establish stock, lead time or a current unit price.<\/p>\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"How_Should_LF0111_Be_Called_Out_on_a_Drawing\"><\/span>How Should LF0111 Be Called Out on a Drawing?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n<p>A material note for <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/11\/dupont-pyralux-lf0111\/\">Dupont Pyralux LF0111<\/a> can read: \u201cBond L2 to L3 using Pyralux LF0111 bond ply, nominal 1 mil modified acrylic \/ 1 mil Kapton \/ 1 mil modified acrylic. Bond only within the outline shown on mechanical layer BP1.\u201d Replace the example layer names with the actual drawing references. Give the finished dielectric spacing separately wherever the design controls it.<\/p>\n\n<figure class=\"wp-block-table\"><table class=\"has-fixed-layout\"><thead><tr><th>Send with the drawing<\/th><th>Decision it supports<\/th><\/tr><\/thead><tbody><tr><td>L2 and L3 artwork plus copper thickness at bonding<\/td><td>Review adhesive demand around facing traces and planes.<\/td><\/tr><tr><td>Dimensioned bond-ply outline and keep-clear areas<\/td><td>Locate openings, rigid-to-flex transitions and free-flex leaves.<\/td><\/tr><tr><td>Critical spacing with tolerance and inspection location<\/td><td>Define the feature the finished board must meet.<\/td><\/tr><tr><td>Order quantity, lot traceability and substitution policy<\/td><td>Check material availability and quote the approved build.<\/td><\/tr><\/tbody><\/table><\/figure>\n\n<p>At EBest Circuit (Best Technology), we can review the proposed layer pair, the bonded outline and the areas that must remain free to flex. Send the stackup, copper files and mechanical drawing to <a href=\"mailto:sales@bestpcbs.com\">sales@bestpcbs.com<\/a> for a manufacturing review and quotation.<\/p>","protected":false},"excerpt":{"rendered":"<p>Dupont Pyralux LF0111 is a two-sided adhesive bond ply. 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