{"id":32630,"date":"2026-07-30T17:28:22","date_gmt":"2026-07-30T09:28:22","guid":{"rendered":"https:\/\/www.bestpcbs.com\/blog\/?p=32630"},"modified":"2026-07-30T17:28:30","modified_gmt":"2026-07-30T09:28:30","slug":"wire-bonding-epig-thickness","status":"publish","type":"post","link":"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/","title":{"rendered":"Wire Bonding EPIG Thickness: Pd\/Au Ranges and Test Requirements"},"content":{"rendered":"<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_85 ez-toc-wrap-left counter-hierarchy ez-toc-counter ez-toc-grey ez-toc-container-direction\">\n<div class=\"ez-toc-title-container\">\n<p class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/p>\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #999;color:#999\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #999;color:#999\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#What_Are_the_Wire_Bonding_EPIG_Thickness_Requirements\" >What Are the Wire Bonding EPIG Thickness Requirements?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#Wire_Bonding_EPIG_Thickness_Chart\" >Wire Bonding EPIG Thickness Chart<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#What_Is_EPIG_and_How_Is_It_Different_from_ENEPIG\" >What Is EPIG, and How Is It Different from ENEPIG?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#Why_Does_Gold_Thickness_Affect_Wire-Bond_Performance\" >Why Does Gold Thickness Affect Wire-Bond Performance?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#What_Does_Palladium_Thickness_Control\" >What Does Palladium Thickness Control?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#How_Do_Wire_Type_and_Bonding_Method_Change_the_Required_Thickness\" >How Do Wire Type and Bonding Method Change the Required Thickness?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#What_Should_the_Fabrication_Drawing_Specify\" >What Should the Fabrication Drawing Specify?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#How_Should_EPIG_Thickness_Be_Measured\" >How Should EPIG Thickness Be Measured?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#Which_Tests_Qualify_EPIG_for_Wire_Bonding\" >Which Tests Qualify EPIG for Wire Bonding?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#What_Causes_EPIG_Wire-Bond_Failures\" >What Causes EPIG Wire-Bond Failures?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-11\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#When_Should_You_Choose_EPIG_Instead_of_ENEPIG\" >When Should You Choose EPIG Instead of ENEPIG?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-12\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#FAQ_About_Wire_Bonding_EPIG_Thickness\" >FAQ About Wire Bonding EPIG Thickness<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-13\" href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/#How_Can_EBest_Circuit_Review_Your_Wire-Bonding_PCB_Build\" >How Can EBest Circuit Review Your Wire-Bonding PCB Build?<\/a><\/li><\/ul><\/nav><\/div>\n<div class=\"yzp-no-index\"><\/div><p><a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/\">Wire bonding EPIG thickness<\/a> is not governed by one universal IPC value. Published EPIG studies and supplier guidance commonly evaluate or use palladium from about 0.05 to 1.0 \u00b5m and immersion gold from about 0.05 to 0.20 \u00b5m, while a narrower starting window around 0.10\u20130.15 \u00b5m Pd and 0.10\u20130.20 \u00b5m Au appears in practical process guidance. These numbers are starting points, not automatic acceptance limits.<\/p>\n<p>The approved thickness must match the wire material, bond method, pad geometry, cleaning process, thermal history, and reliability target. It must also be confirmed by coating measurement and wire-bond testing. This guide separates nickel-free EPIG from ENEPIG and shows how engineers can turn a published range into a controlled fabrication requirement.<\/p>\n<figure style=\"max-width:600px;margin:24px auto;\">\n    <img fetchpriority=\"high\" decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/07\/wire-bonding-epig-thickness-hero.jpg\" alt=\"Wire Bonding EPIG Thickness on nickel-free palladium and gold PCB pads\" width=\"1200\" height=\"800\" style=\"display:block;width:100%;max-width:600px;max-height:400px;height:auto;object-fit:contain;\" loading=\"eager\"><br \/>\n  <\/figure>\n<h2><span class=\"ez-toc-section\" id=\"What_Are_the_Wire_Bonding_EPIG_Thickness_Requirements\"><\/span>What Are the Wire Bonding EPIG Thickness Requirements?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>The essential requirement is a project-specific Pd\/Au thickness window backed by the fabricator\u2019s chemistry limits and the assembler\u2019s bond qualification. EPIG does not have a universal IPC finish specification equivalent to the ENEPIG specification in IPC-4556. A drawing that says only \u201cEPIG per IPC-4556\u201d mixes two different finishes and leaves the actual EPIG deposit uncontrolled.<\/p>\n<p>A useful starting specification should identify:<\/p>\n<ul>\n<li><strong>Finish stack:<\/strong> electroless palladium over copper, followed by immersion gold, with no electroless nickel layer.<\/li>\n<li><strong>Pd and Au thickness:<\/strong> separate nominal values or minimum\/maximum limits for each layer.<\/li>\n<li><strong>Bond process:<\/strong> wire material, wire diameter, ball or wedge bonding, and expected process window.<\/li>\n<li><strong>Thermal exposure:<\/strong> assembly reflow, bake, storage, and any aging condition before bonding.<\/li>\n<li><strong>Acceptance method:<\/strong> XRF measurement plan, wire-pull criteria, failure-mode review, and sampling level.<\/li>\n<\/ul>\n<p>Do not convert an experimental window into a production guarantee without qualification. The useful question is not \u201cWhat is the thickest coating?\u201d but \u201cWhich controlled deposit produces stable bonds after the real assembly history?\u201d<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Wire_Bonding_EPIG_Thickness_Chart\"><\/span>Wire Bonding EPIG Thickness Chart<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>The following chart separates published evidence from a production specification. It gives engineering starting points without presenting them as universal limits.<\/p>\n<div class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Layer or Control<\/strong><\/td>\n<td><strong>Published or Practical Starting Range<\/strong><\/td>\n<td><strong>What Must Be Confirmed<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Electroless palladium<\/td>\n<td>0.05\u20131.0 \u00b5m in a published DoE; about 0.10\u20130.15 \u00b5m in practical process guidance<\/td>\n<td>Coverage, diffusion barrier performance, solder interaction, and process capability<\/td>\n<\/tr>\n<tr>\n<td>Immersion gold<\/td>\n<td>0.05\u20130.20 \u00b5m in published studies; about 0.10\u20130.20 \u00b5m as a practical starting window<\/td>\n<td>Bondability, surface condition, porosity, thermal aging, and pull-test result<\/td>\n<\/tr>\n<tr>\n<td>Gold wire<\/td>\n<td>1.0 mil wire was used in one published EPIG study<\/td>\n<td>Actual wire alloy, diameter, ball geometry, and bonding parameters<\/td>\n<\/tr>\n<tr>\n<td>Qualification<\/td>\n<td>No single universal EPIG acceptance window<\/td>\n<td>XRF mapping, wire pull, failure location, aging, and lot controls<\/td>\n<\/tr>\n<\/tbody>\n<\/table><\/div>\n<p>Thickness units must be unambiguous. One micrometre equals about 39.37 microinches. Keep the drawing in one unit system or show both units with a controlled conversion; do not let a supplier infer whether a value means \u00b5m or \u00b5in.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_Is_EPIG_and_How_Is_It_Different_from_ENEPIG\"><\/span>What Is EPIG, and How Is It Different from ENEPIG?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>EPIG is a nickel-free finish with copper, electroless palladium, and immersion gold. ENEPIG adds electroless nickel between copper and palladium. That one layer changes the diffusion path, deposit structure, process control, and the standards that can be cited.<\/p>\n<figure style=\"max-width:600px;margin:24px auto;\">\n    <img decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/07\/epig-vs-enepig-layer-stack.jpg\" alt=\"EPIG and ENEPIG layer stack comparison for wire bonding\" width=\"1200\" height=\"660\" style=\"display:block;width:100%;max-width:600px;max-height:400px;height:auto;object-fit:contain;\" loading=\"lazy\"><br \/>\n  <\/figure>\n<div class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Finish<\/strong><\/td>\n<td><strong>Layer Stack<\/strong><\/td>\n<td><strong>Specification Point<\/strong><\/td>\n<\/tr>\n<tr>\n<td>EPIG<\/td>\n<td>Cu \/ Pd \/ Au<\/td>\n<td>No universal IPC finish thickness specification; define and qualify the project window<\/td>\n<\/tr>\n<tr>\n<td>ENEPIG<\/td>\n<td>Cu \/ Ni \/ Pd \/ Au<\/td>\n<td>IPC-4556 addresses ENEPIG, not nickel-free EPIG<\/td>\n<\/tr>\n<tr>\n<td>ENIG<\/td>\n<td>Cu \/ Ni \/ Au<\/td>\n<td>Different surface chemistry and wire-bond behavior; do not reuse EPIG limits<\/td>\n<\/tr>\n<\/tbody>\n<\/table><\/div>\n<p>This distinction matters because many search results for \u201cwire bonding EPIG thickness\u201d actually provide ENEPIG values. For background on the nickel-containing finish, see our <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/04\/enepig-pcb-finish\/\">ENEPIG PCB finish guide<\/a> and our comparison of <a href=\"https:\/\/www.bestpcbs.com\/blog\/2024\/01\/what-are-differences-of-enig-vs-enepig-in-pcb-manufacturing-series-1\/\">ENIG vs ENEPIG<\/a>.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Why_Does_Gold_Thickness_Affect_Wire-Bond_Performance\"><\/span>Why Does Gold Thickness Affect Wire-Bond Performance?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Gold thickness affects the condition of the top surface that receives the bond. In a published EPIG design of experiments using 1.0 mil gold wire, increasing the immersion-gold thickness improved the wire-pull response more clearly than changing palladium thickness. That finding supports tighter control of the Au deposit, but it does not establish one best value for every bonding process.<\/p>\n<p>Gold that is too thin for the chosen chemistry and thermal history can leave a surface more sensitive to palladium exposure, porosity, contamination, or diffusion effects. Simply specifying \u201cmore gold\u201d is not a complete solution either. The immersion process has its own chemistry window, and the bond must be evaluated after the same storage, bake, plasma clean, and assembly exposure expected in production.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_Does_Palladium_Thickness_Control\"><\/span>What Does Palladium Thickness Control?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Palladium separates the immersion-gold surface from copper and can act as a diffusion barrier. In one aging study, a 0.15 \u00b5m Pd deposit reduced copper diffusion under the tested 175\u00b0C for 16-hour condition. The same result should not be treated as a universal minimum because the result depends on deposit quality, chemistry, temperature, time, and the rest of the assembly process.<\/p>\n<p>In the published EPIG DoE, palladium thickness had a stronger practical effect on solder-joint shear than on gold-wire pull. That is important for pads expected to support both soldering and wire bonding: the specification should protect both interfaces rather than optimize one result in isolation.<\/p>\n<figure style=\"max-width:600px;margin:24px auto;\">\n    <img decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/07\/epig-wire-pull-layer-role.jpg\" alt=\"Gold wire pull on Au Pd Cu EPIG layer stack\" width=\"1200\" height=\"800\" style=\"display:block;width:100%;max-width:600px;max-height:400px;height:auto;object-fit:contain;\" loading=\"lazy\"><br \/>\n  <\/figure>\n<h2><span class=\"ez-toc-section\" id=\"How_Do_Wire_Type_and_Bonding_Method_Change_the_Required_Thickness\"><\/span>How Do Wire Type and Bonding Method Change the Required Thickness?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Wire bonding thickness cannot be selected independently of the bonding system. Gold ball bonding, gold wedge bonding, aluminum wire, copper wire, and ribbon bonding apply different ultrasonic energy, force, temperature, and deformation to the pad.<\/p>\n<ul>\n<li><strong>Wire material and diameter:<\/strong> change bond deformation and required interfacial strength.<\/li>\n<li><strong>Ball or wedge process:<\/strong> changes contact geometry and the way force and ultrasonic energy enter the pad.<\/li>\n<li><strong>Pad size and support:<\/strong> affect stress concentration, bond placement tolerance, and pad-lift risk.<\/li>\n<li><strong>Bonding parameters:<\/strong> force, ultrasonic power, time, and temperature must be developed together.<\/li>\n<li><strong>Surface preparation:<\/strong> contamination, oxidation, handling, and plasma cleaning can change the result even when XRF thickness is correct.<\/li>\n<\/ul>\n<p>Define the wire process before freezing the finish. Our guides to <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/06\/wire-bonding-gold-wire\/\">gold wire bonding<\/a> and <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/04\/wire-bonding-pad-design\/\">wire-bonding pad design<\/a> cover two other parts of the same interface.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_Should_the_Fabrication_Drawing_Specify\"><\/span>What Should the Fabrication Drawing Specify?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>The drawing should state the exact EPIG stack, separate Pd and Au limits, and the approved measurement and qualification requirements. Avoid a generic finish note that forces the fabricator to guess.<\/p>\n<p>A controlled callout can include:<\/p>\n<ul>\n<li><strong>Finish:<\/strong> \u201cNickel-free EPIG: electroless Pd \/ immersion Au over Cu.\u201d<\/li>\n<li><strong>Thickness:<\/strong> project-approved Pd and Au minimum\/maximum limits in \u00b5m or \u00b5in.<\/li>\n<li><strong>Applicable pads:<\/strong> whether EPIG applies to all exposed copper or only selected wire-bond pads.<\/li>\n<li><strong>Measurement:<\/strong> XRF method, coupon or pad locations, sample quantity, and reporting requirement.<\/li>\n<li><strong>Bonding use:<\/strong> wire material, diameter, bond type, and thermal exposure before bonding.<\/li>\n<li><strong>Acceptance:<\/strong> approved wire-pull method, minimum force or statistical limit, and acceptable failure modes.<\/li>\n<\/ul>\n<p>Do not cite IPC-4556 as though it were an EPIG finish specification. If ENEPIG is acceptable as an alternative, list it separately and require written approval before substitution.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"How_Should_EPIG_Thickness_Be_Measured\"><\/span>How Should EPIG Thickness Be Measured?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>X-ray fluorescence is the normal non-destructive method for measuring thin metallic deposits, but the measurement plan matters as much as the instrument. The XRF method must be calibrated for the Cu\/Pd\/Au stack, and the aperture must suit the pad or coupon size.<\/p>\n<p>A practical plan should cover:<\/p>\n<ul>\n<li>multiple locations across the production panel, not one convenient coupon reading;<\/li>\n<li>separate reporting of Pd and Au thickness;<\/li>\n<li>defined edge exclusion where pad geometry can distort the reading;<\/li>\n<li>measurement-system checks using traceable reference standards;<\/li>\n<li>lot records that connect the coating results to the bond-test samples.<\/li>\n<\/ul>\n<p>XRF confirms deposit thickness. It does not by itself prove cleanliness, bondability, adhesion, or reliability after thermal aging.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"Which_Tests_Qualify_EPIG_for_Wire_Bonding\"><\/span>Which Tests Qualify EPIG for Wire Bonding?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>A useful qualification combines coating data with wire-pull results and failure-mode inspection. One published EPIG study used MIL-STD-883 Method 2011, Condition D for wire pull, but the project team must select the method, sample size, and acceptance criteria that match its package and reliability class.<\/p>\n<figure style=\"max-width:600px;margin:24px auto;\">\n    <img decoding=\"async\" src=\"https:\/\/www.bestpcbs.com\/blog\/wp-content\/uploads\/2026\/07\/epig-xrf-wire-pull-testing.jpg\" alt=\"XRF coating measurement and wire pull qualification for EPIG PCB pads\" width=\"1200\" height=\"800\" style=\"display:block;width:100%;max-width:600px;max-height:400px;height:auto;object-fit:contain;\" loading=\"lazy\"><br \/>\n  <\/figure>\n<ul>\n<li><strong>As-plated bond test:<\/strong> establishes the initial process window.<\/li>\n<li><strong>Post-clean test:<\/strong> verifies that plasma or chemical preparation does not damage the finish.<\/li>\n<li><strong>Thermal-aging test:<\/strong> exposes diffusion or surface degradation that an immediate test can miss.<\/li>\n<li><strong>Wire-pull distribution:<\/strong> evaluates variation, not only the average.<\/li>\n<li><strong>Failure-mode analysis:<\/strong> distinguishes wire break, heel break, interfacial lift, and pad or metallization failure.<\/li>\n<li><strong>Solder test where applicable:<\/strong> confirms pads serving both solder and wire-bond functions.<\/li>\n<\/ul>\n<p>Record the bonding parameters with the result. A passing pull number without force, ultrasonic power, time, temperature, capillary, and wire-lot data is difficult to reproduce.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"What_Causes_EPIG_Wire-Bond_Failures\"><\/span>What Causes EPIG Wire-Bond Failures?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>EPIG wire-bond failures usually come from the interaction of surface condition, deposit control, bonding parameters, pad construction, and thermal history rather than thickness alone.<\/p>\n<ul>\n<li><strong>Surface contamination:<\/strong> handling residue, organic films, or poor rinsing can block metal-to-metal contact.<\/li>\n<li><strong>Thin or non-uniform Au:<\/strong> can increase sensitivity to exposed Pd, porosity, and local variation.<\/li>\n<li><strong>Diffusion after heat exposure:<\/strong> can change the top-surface chemistry before bonding.<\/li>\n<li><strong>Uncontrolled Pd deposit:<\/strong> may compromise barrier behavior or the combined solder\/bond requirement.<\/li>\n<li><strong>Incorrect bonding recipe:<\/strong> insufficient energy causes weak interfaces; excessive energy or force can damage the pad or heel.<\/li>\n<li><strong>Poor pad design:<\/strong> small pads, weak copper anchoring, or nearby mask geometry can reduce the process margin.<\/li>\n<\/ul>\n<p>When a bond fails, compare the actual break location with XRF maps, surface analysis, process logs, and thermal history. Raising ultrasonic energy without identifying the interface can hide the cause and create a new failure mode.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"When_Should_You_Choose_EPIG_Instead_of_ENEPIG\"><\/span>When Should You Choose EPIG Instead of ENEPIG?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>Choose EPIG when the design has a justified need for a nickel-free bond-pad finish and the supply chain can qualify that exact Cu\/Pd\/Au process. Consider ENEPIG when the established nickel barrier, IPC-4556 framework, and broader fabrication availability better fit the product.<\/p>\n<div class=\"wp-block-table\">\n<table>\n<tbody>\n<tr>\n<td><strong>Decision Factor<\/strong><\/td>\n<td><strong>EPIG<\/strong><\/td>\n<td><strong>ENEPIG<\/strong><\/td>\n<\/tr>\n<tr>\n<td>Metal stack<\/td>\n<td>Nickel-free Cu \/ Pd \/ Au<\/td>\n<td>Cu \/ Ni \/ Pd \/ Au<\/td>\n<\/tr>\n<tr>\n<td>Specification route<\/td>\n<td>Supplier- and project-qualified window<\/td>\n<td>IPC-4556 plus project requirements<\/td>\n<\/tr>\n<tr>\n<td>Engineering burden<\/td>\n<td>More explicit process confirmation and validation<\/td>\n<td>More standardized industry framework<\/td>\n<\/tr>\n<tr>\n<td>Best fit<\/td>\n<td>Products that specifically need a nickel-free finish<\/td>\n<td>Mixed soldering and wire-bond applications that accept nickel<\/td>\n<\/tr>\n<\/tbody>\n<\/table><\/div>\n<p>Do not select EPIG only because a search result gives a thinner stack. Availability, minimum order, qualification work, yield, test cost, and lead time can outweigh the material difference. Confirm the finish with both the PCB fabricator and the wire-bond assembly team before design release.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"FAQ_About_Wire_Bonding_EPIG_Thickness\"><\/span>FAQ About Wire Bonding EPIG Thickness<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<h3>Is IPC-4556 an EPIG thickness standard?<\/h3>\n<p>No. IPC-4556 covers ENEPIG, which contains an electroless nickel layer. Nickel-free EPIG needs a separate supplier-supported and project-qualified thickness callout.<\/p>\n<h3>Can one wire bonding thickness work for every wire material?<\/h3>\n<p>No. Wire alloy, diameter, ball or wedge process, bonding parameters, pad geometry, and thermal history change the required process window.<\/p>\n<h3>Does thicker gold always produce a stronger bond?<\/h3>\n<p>No. Published EPIG work shows that Au thickness can materially affect wire pull, but deposit chemistry, surface condition, aging, and bonding parameters still control the final result. Use a qualified window rather than an unlimited \u201cthicker is better\u201d rule.<\/p>\n<h3>Can wire bonding ENEPIG data be used for EPIG?<\/h3>\n<p>Not directly. Wire bonding ENEPIG data includes the effect of a nickel layer that EPIG does not have. It can inform a comparison, but it cannot replace EPIG-specific testing.<\/p>\n<h3>Should EPIG be tested after thermal aging?<\/h3>\n<p>Yes, when the product will see bake, reflow, storage, or other heat exposure before or after bonding. Aging can reveal diffusion and surface changes that an as-plated test misses.<\/p>\n<h2><span class=\"ez-toc-section\" id=\"How_Can_EBest_Circuit_Review_Your_Wire-Bonding_PCB_Build\"><\/span>How Can EBest Circuit Review Your Wire-Bonding PCB Build?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n<p>At EBest Circuit, we support PCB and PCBA projects that include wire-bonding requirements. For a nickel-free EPIG request, we will first review the finish callout and confirm process availability rather than assume that ENEPIG data applies.<\/p>\n<p>Send your Gerber files, fabrication drawing, pad map, wire material and diameter, bond method, thermal history, test criteria, quantity, and required delivery date to <a href=\"mailto:sales@bestpcbs.com\">sales@bestpcbs.com<\/a>. We can then review the build, identify missing controls, and discuss a practical qualification path. Revisit this <a href=\"https:\/\/www.bestpcbs.com\/blog\/2026\/07\/wire-bonding-epig-thickness\/\">wire bonding EPIG thickness guide<\/a> when preparing the finish and acceptance notes.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Learn practical wire bonding EPIG thickness ranges, how EPIG differs from ENEPIG, and how to specify, measure, and qualify Pd\/Au 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