# 100-Ohm PCB Pair Guide: Are Two 50-Ohm Traces Enough?

_Published: 2026-11-07_

Table of Contents

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- What Does a 100-Ohm Differential Target Describe?
- Which Impedance Parameters Must Stay Separate?
- Isolated-Trace vs Coupled-Pair Design
- Derive the Factor of Two from Voltage and Current
- A Worked Example Shows How Two Isolated 50-Ohm Traces Miss
- Why Does the Gap Change Odd-Mode Impedance?
- Solve Width and Stackup Together
- Can a Weakly Coupled Pair Still Be 100 Ohms?
- Even Mode Is Not Another Name for Differential Mode
- Recognize Where the Uniform-Line Model Stops
- Write the Fabrication Requirement in the Correct Mode
- Close the Design with a Reproducible Verification Basis
- FAQ

Two traces that are each 50 Ω when modeled in isolation are not automatically a 100 Ω differential pair once placed close together. Mutual coupling changes the pair’s modal behavior. For a symmetric pair under differential excitation, the differential impedance is twice its odd-mode impedance—not necessarily twice the impedance of an isolated trace.

![Two parallel exposed copper traces on a green PCB test structure](https://www.bestpcbs.com/blog/wp-content/uploads/2026/11/pcb-differential-copper-pair.jpg)A pair of parallel copper traces. AI-generated illustration; geometry in a photograph does not establish impedance.
Follow a hypothetical interface whose specified differential target is 100 Ω. The designer initially selects a width that gives 50 Ω for one isolated trace, then places two such traces close together. We will distinguish what that calculation proves from what the actual pair still needs. The example does not assign a target or tolerance to every interface.

## What Does a 100-Ohm Differential Target Describe?

It describes the transmission-line impedance associated with differential voltage and the corresponding loop current in the pair. It is not the DC resistance measured between the traces.

Each conductor has a voltage relative to the reference, while the receiver also sees the voltage difference between conductors. Those are different voltage definitions, so they produce different impedance definitions. [AMD UG583’s transceiver guidance](https://docs.amd.com/r/en-US/ug583-ultrascale-pcb-design/Trace-Characteristic-Impedance-Design-for-High-Speed-Transceivers) explicitly relates 50 Ω odd mode to 100 Ω differential. Its application-specific recommendation should not be copied as a requirement for an unrelated interface.

## Which Impedance Parameters Must Stay Separate?

Name the excitation and current convention beside the impedance value. Otherwise, “50 ohms per trace” can refer to different calculations.

**Quantity**
**Meaning for a symmetric pair**
**Example or relation**

Isolated Z0
One trace without the coupled neighbor
Assume 50 Ω

Odd-mode Zodd
Per-line impedance under opposite excitation
Assume 45 Ω after coupling

Differential Zdiff
Between the pair under differential excitation
2 × Zodd = 90 Ω

Even-mode Zeven
Per-line impedance under equal excitation
Assume 60 Ω in that example

Common-mode Zcommon
Common voltage divided by total pair current
Zeven / 2 = 30 Ω

The numerical entries are illustrative model outputs, not results computed from the pictured board or a real stackup. The relationships follow the stated symmetric-line conventions.

## Isolated-Trace vs Coupled-Pair Design

The isolated-line calculation omits the neighbor’s contribution, while the coupled-pair calculation includes it. Use the latter when checking the specified differential structure.

**Design choice**
**Useful check**
**What not to assume**

Choose width from isolated Z0
Single-line baseline
Pair remains twice that value at every gap

Set width and gap together
Actual coupled cross-section
One width works on every stackup

Increase separation
Recalculate both modes
“Three widths” proves a target

Change layer or dielectric
Re-solve the new structure
Same artwork keeps the same impedance

Check a transition
Use an appropriate transition model
Uniform-line results cover pads and vias

This distinction concerns model scope. It is not a demand that every differential signal be routed with the tightest possible coupling.

## Derive the Factor of Two from Voltage and Current

The factor of two comes from the differential voltage definition for a balanced odd-mode excitation. It does not require adding two physical resistors to the PCB.

Suppose one trace is at +0.5 V and the other at −0.5 V, with equal and opposite currents of magnitude 10 mA. Each trace’s odd-mode ratio is 0.5 V / 0.010 A = 50 Ω. The differential voltage is 1.0 V, and its loop current magnitude is still 10 mA, so Zdiff = 1.0 V / 0.010 A = 100 Ω. These assumed traveling-wave quantities explain the definition; they are not a DC measurement prescription.

## A Worked Example Shows How Two Isolated 50-Ohm Traces Miss

If coupling changes the per-line odd-mode impedance, doubling the old isolated result no longer describes the pair. Recalculate the actual cross-section.

Assume an isolated-trace model gives Z0 = 50 Ω, but a separate coupled-pair model for the intended gap gives Zodd = 45 Ω. The pair is then 90 Ω differential, not 100 Ω. The 10 Ω difference is 10% of the hypothetical target; whether it is acceptable depends on the actual specification. The 45 Ω value is an assumed teaching output, not a prediction from width alone. No fixed correction factor converts every isolated 50 Ω design into the right pair.

## Why Does the Gap Change Odd-Mode Impedance?

The adjacent conductor changes the electromagnetic fields and coupling between the lines. Opposite-polarity excitation is therefore not equivalent to removing the neighbor.

[Polar Instruments AP157](https://www.polarinstruments.com/support/cits/AP157.html) distinguishes the odd, even and isolated modes. For ordinary symmetric edge-coupled structures, narrowing the gap generally lowers odd-mode impedance relative to the isolated case; widening the gap reduces the coupling. Check the actual cross-section rather than treating that trend as a numerical design formula. Nearby copper, dielectric boundaries and reference-plane geometry also belong in the model.

## Solve Width and Stackup Together

Width, copper thickness, dielectric geometry and material properties influence the solution along with the gap. A gap adjustment should be assessed within the complete manufacturing construction.

For the hypothetical interface, ask the fabricator for the proposed cured stackup and achievable trace geometry, then solve the candidate pair using appropriate material data. Do not keep a width selected for a different layer height merely because its old calculation said 50 Ω. Record whether the dimensions describe artwork, finished top width or another geometry convention. A clearly named input is more reproducible than a screenshot of an unlabeled calculator result.

## Can a Weakly Coupled Pair Still Be 100 Ohms?

Yes. In the weak-coupling limit, two equal lines approach independent behavior, and a pair of isolated 50 Ω lines can approach 100 Ω differential. Tight coupling is not the definition of differential signaling.

That limiting case does not remove the need for suitable references, balanced routing and interface-specific constraints. Evaluate whether the available routing geometry preserves the intended behavior along the path. A long uncoupled region, connector breakout and closely coupled region can each have different cross-sections. Avoid turning a general “route together” recommendation into an arbitrary universal gap requirement.

## Even Mode Is Not Another Name for Differential Mode

Even-mode excitation drives the two lines with equal polarity, while odd mode uses opposite polarity. The same physical pair therefore has different modal quantities.

Using the assumed table value Zeven = 60 Ω, a common voltage of 0.6 V produces 10 mA on each line in the idealized mode. Total current is 20 mA, so the pair’s common-mode impedance under this convention is 30 Ω. This explains why Zeven and Zcommon differ by a factor of two. It does not prove that a real link has no common-mode noise or that an arbitrary termination is appropriate.

![Bare PCB differential test coupon with two separate coaxial launches](https://www.bestpcbs.com/blog/wp-content/uploads/2026/11/differential-pcb-test-coupon.jpg)Illustrative two-port coupon connection. AI-generated, not a validated launch geometry or impedance test record.

## Recognize Where the Uniform-Line Model Stops

A two-dimensional cross-section describes a uniform line, not every pad, via, connector or reference transition on the route. Those discontinuities need an appropriate additional assessment.

Inspect where the teaching pair changes gap, enters a connector or moves layers. Do not infer that a correct straight-section result proves the entire channel meets its requirements. For relevant via geometry, the [Best Technology differential-antipad guide](https://www.bestpcbs.com/blog/2026/11/differential-via-shared-antipad/) addresses a separate design decision. Keep transition effects and line-target errors distinguishable so a local mismatch does not lead to unnecessary changes across the whole board.

## Write the Fabrication Requirement in the Correct Mode

State the differential target, tolerance, layer, referenced structure and test expectations explicitly. Do not ask for “50 ohms on each trace” if the actual acceptance requirement is a differential pair.

A coupon and measurement plan should represent the intended construction within their agreed scope. Confirm the instrument’s mode and reporting convention before comparing values. A single-ended observation of one conductor is not automatically a differential result. The [Best Technology differential-pair design guide](https://www.bestpcbs.com/blog/2026/08/differential-pair-pcb/) covers the wider routing and manufacturing handoff; this article clarifies the impedance definitions within it.

## Close the Design with a Reproducible Verification Basis

Retain the input construction, mode definitions, calculated result and agreed manufacturing evidence together. The objective is a controlled, verifiable pair—not a favorable number obtained by changing unnamed assumptions.

For the hypothetical link, verify that the final model satisfies its specified 100 Ω target and any other required channel criteria, then reconcile the production evidence with that basis. To discuss Best Technology fabrication requirements, send the stackup, routed layer, differential target and tolerance to [sales@bestpcbs.com](mailto:sales@bestpcbs.com). Testing and modeling scope must be confirmed for the project rather than inferred from this educational example.

## FAQ

### Will a 100-ohm resistor make a 90-ohm pair become 100 ohms?

No. A termination sets the load seen at its location; it does not change the characteristic impedance of the distributed line geometry. Select termination according to the actual interface and analyze mismatches appropriately. Do not use a resistor substitution as evidence that an incorrectly modeled PCB cross-section now meets its fabrication target.

### Why does my multimeter not read 100 ohms between the traces?

Characteristic impedance describes traveling-wave behavior, not simply DC resistance between two bare conductors. A multimeter can be affected by termination components or circuit paths, and an unconnected bare pair may appear open. Use an appropriate impedance measurement method and clearly identify the connected circuit before interpreting the reading.

### Are all high-speed differential interfaces specified at 100 ohms?

No. Required impedance and tolerances depend on the interface and implementation guidance. The 100 Ω target in this article is a hypothetical teaching requirement, not a universal recommendation. Check the actual device and interface documentation before selecting geometry, termination or a fabrication acceptance limit for the project.

### Can I double a single-ended TDR result to obtain differential impedance?

Not without establishing what the measurement represents. Exciting one line while treating its neighbor differently is not automatically a pure odd-mode measurement. Confirm the setup, terminations, calibration and conversion method. Doubling is valid for the defined odd-mode impedance, not every impedance trace displayed by a single-ended instrument.

### Does correct differential impedance guarantee equal propagation delay?

No. Impedance and timing are separate design quantities. Geometry and materials influence both, but meeting one numerical target does not establish acceptable skew or total delay. Review the interface’s timing requirements and the actual path, including transitions, rather than treating an impedance pass as a complete channel qualification.

### Does a symmetric drawing guarantee no mode conversion?

No. The manufactured structure, surrounding references, connectors and excitation can introduce imbalance even when two traces look symmetric in CAD. Maintain appropriate symmetry and analyze relevant discontinuities. A uniform-line impedance calculation is useful evidence for its own scope, but it is not proof that the assembled channel has zero conversion.

### Can a solder-mask change affect the pair without changing its artwork?

It can alter the surrounding dielectric environment, particularly for outer-layer structures, so include the intended mask construction where it matters to the model. The size of any effect depends on the actual geometry and materials. Do not assume a fixed percentage change or approve a substitution without the relevant review.

### Is impedance the only reason to keep a pair’s spacing consistent?

No. Consistent geometry also helps make coupling, propagation and the modeled structure predictable. Nevertheless, short constrained breakouts may require different spacing and a separate assessment. Apply the interface requirements and suitable analysis rather than forcing every segment into one gap at the expense of reference continuity or manufacturability.